linux/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var1.dts
Michael Walle 52387bb9a4 arm64: dts: freescale: sl28: var1: fix RGMII clock and voltage
During hardware validation it was noticed that the clock isn't
continuously enabled when there is no link. This is because the 125MHz
clock is derived from the internal PLL which seems to go into some kind
of power-down mode every once in a while. The LS1028A expects a contiuous
clock. Thus enable the PLL all the time.

Also, the RGMII pad voltage is wrong, it was configured to 2.5V (that is
the VDDH regulator). The correct voltage is 1.8V, i.e. the VDDIO
regulator.

This fix is for the freescale/fsl-ls1028a-kontron-sl28-var1.dts.

Fixes: 642856097c18 ("arm64: dts: freescale: sl28: add variant 1")
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-05-23 13:07:57 +08:00

64 lines
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// SPDX-License-Identifier: GPL-2.0+
/*
* Device Tree file for the Kontron SMARC-sAL28 board.
*
* This is for the network variant 1 which has one ethernet port. It is
* different than the base variant, which also has one port, but here the
* port is connected via RGMII. This port is not TSN aware.
* None of the four SerDes lanes are used by the module, instead they are
* all led out to the carrier for customer use.
*
* Copyright (C) 2020 Michael Walle <michael@walle.cc>
*
*/
/dts-v1/;
#include "fsl-ls1028a-kontron-sl28.dts"
#include <dt-bindings/net/qca-ar803x.h>
/ {
model = "Kontron SMARC-sAL28 (4 Lanes)";
compatible = "kontron,sl28-var1", "kontron,sl28", "fsl,ls1028a";
};
&enetc_port0 {
status = "disabled";
/*
* Delete both the phy-handle to the old phy0 label as well as
* the mdio node with the old phy node with the old phy0 label.
*/
/delete-property/ phy-handle;
/delete-node/ mdio;
};
&enetc_port1 {
phy-handle = <&phy0>;
phy-connection-type = "rgmii-id";
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
phy0: ethernet-phy@4 {
reg = <0x4>;
eee-broken-1000t;
eee-broken-100tx;
qca,clk-out-frequency = <125000000>;
qca,clk-out-strength = <AR803X_STRENGTH_FULL>;
qca,keep-pll-enabled;
vddio-supply = <&vddio>;
vddio: vddio-regulator {
regulator-name = "VDDIO";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vddh: vddh-regulator {
regulator-name = "VDDH";
};
};
};
};