c24d340598
Convert txt binding of TI's qspi controller (found on their omap SoCs) to dtschema to allow for validation. The changes, w.r.t. the original txt binding, are: - Introduce "clocks" and "clock-names" which was never mentioned. - Reflect that "ti,hwmods" is deprecated and is not a "required" property anymore. - Introduce "num-cs" which allows for setting the number of chip selects. - Drop "qspi_ctrlmod". Signed-off-by: Kousik Sanagavarapu <five231003@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240501165203.13763-1-five231003@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
97 lines
2.1 KiB
YAML
97 lines
2.1 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/spi/ti,qspi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: TI QSPI controller
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maintainers:
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- Kousik Sanagavarapu <five231003@gmail.com>
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allOf:
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- $ref: spi-controller.yaml#
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properties:
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compatible:
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enum:
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- ti,am4372-qspi
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- ti,dra7xxx-qspi
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reg:
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items:
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- description: base registers
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- description: mapped memory
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reg-names:
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items:
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- const: qspi_base
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- const: qspi_mmap
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clocks:
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maxItems: 1
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clock-names:
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items:
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- const: fck
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interrupts:
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maxItems: 1
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num-cs:
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minimum: 1
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maximum: 4
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default: 1
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ti,hwmods:
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description:
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Name of the hwmod associated to the QSPI. This is for legacy
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platforms only.
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$ref: /schemas/types.yaml#/definitions/string
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deprecated: true
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syscon-chipselects:
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description:
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Handle to system control region containing QSPI chipselect register
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and offset of that register.
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$ref: /schemas/types.yaml#/definitions/phandle-array
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items:
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- items:
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- description: phandle to system control register
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- description: register offset
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spi-max-frequency:
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description: Maximum SPI clocking speed of the controller in Hz.
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$ref: /schemas/types.yaml#/definitions/uint32
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required:
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- compatible
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- reg
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- reg-names
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- clocks
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- clock-names
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- interrupts
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/dra7.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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spi@4b300000 {
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compatible = "ti,dra7xxx-qspi";
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reg = <0x4b300000 0x100>,
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<0x5c000000 0x4000000>;
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reg-names = "qspi_base", "qspi_mmap";
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syscon-chipselects = <&scm_conf 0x558>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&l4per2_clkctrl DRA7_L4PER2_QSPI_CLKCTRL 25>;
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clock-names = "fck";
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num-cs = <4>;
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spi-max-frequency = <48000000>;
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interrupts = <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>;
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};
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...
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