Alexander Shishkin 5118ccd347 intel_th: pci: Add Denverton SOC support ...

This adds Intel(R) Trace Hub PCI ID for Denverton SOC.

Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>

2017-03-15 14:55:17 +02:00

..

core.c

intel_th: Don't leak module refcount on failure to activate

2017-03-15 14:54:57 +02:00

debug.c

…

debug.h

…

gth.c

intel_th: gth: Handle host mode correctly

2016-11-18 17:11:35 +02:00

gth.h

intel_th: Update scratchpad bits according to enabled output activity

2016-02-20 14:09:14 -08:00

intel_th.h

intel_th: Support Host Debugger mode of operation

2016-11-18 17:07:54 +02:00

Kconfig

intel_th: Depend on HAS_IOMEM

2016-02-20 14:09:14 -08:00

Makefile

intel_th: Add PTI output driver

2015-10-04 20:28:58 +01:00

msu.c

mm, fs: reduce fault, page_mkwrite, and pfn_mkwrite to take only vmf

2017-02-24 17:46:54 -08:00

msu.h

intel_th: Add Memory Storage Unit driver

2015-10-04 20:28:58 +01:00

pci.c

intel_th: pci: Add Denverton SOC support

2017-03-15 14:55:17 +02:00

pti.c

intel_th: pti: Create sysfs attributes using core driver's facility

2016-04-08 16:11:57 +03:00

pti.h

intel_th: Add PTI output driver

2015-10-04 20:28:58 +01:00

sth.c

intel_th: Mark sth_stm_packet() with notrace

2016-11-22 17:47:56 -05:00

sth.h

intel_th: Add Software Trace Hub driver

2015-10-04 20:28:58 +01:00