Zidan Wang 51659ca069 ASoC: fsl-sai: set xCR4/xCR5/xMR for SAI master mode
For SAI master mode, when Tx(Rx) sync with Rx(Tx) clock, Rx(Tx) will
generate bclk and frame clock for Tx(Rx), we should set RCR4(TCR4),
RCR5(TCR5) and RMR(TMR) for playback(capture), or there will be sync
error sometimes.

Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
Acked-by: Nicolin Chen <nicoleotsuka@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-11-17 18:51:39 +00:00
..
2015-06-25 17:15:18 -07:00
2015-11-14 09:43:00 -08:00
2015-08-31 16:25:22 +02:00