518d4bb746
The current cache flush and invalidate routines operate by controlling the cache tag registers. Rename the files and add config items to select them. This makes it easier to support the use of other cache flush methods instead, such as the use of AM34's area purge registers, if available. Signed-off-by: David Howells <dhowells@redhat.com>
56 lines
1.4 KiB
Plaintext
56 lines
1.4 KiB
Plaintext
#
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# MN10300 CPU cache options
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#
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choice
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prompt "CPU Caching mode"
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default MN10300_CACHE_WBACK
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help
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This option determines the caching mode for the kernel.
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Write-Back caching mode involves the all reads and writes causing
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the affected cacheline to be read into the cache first before being
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operated upon. Memory is not then updated by a write until the cache
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is filled and a cacheline needs to be displaced from the cache to
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make room. Only at that point is it written back.
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Write-Through caching only fetches cachelines from memory on a
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read. Writes always get written directly to memory. If the affected
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cacheline is also in cache, it will be updated too.
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The final option is to turn of caching entirely.
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config MN10300_CACHE_WBACK
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bool "Write-Back"
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config MN10300_CACHE_WTHRU
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bool "Write-Through"
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config MN10300_CACHE_DISABLED
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bool "Disabled"
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endchoice
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config MN10300_CACHE_ENABLED
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def_bool y if !MN10300_CACHE_DISABLED
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choice
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prompt "CPU cache flush/invalidate method"
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default MN10300_CACHE_MANAGE_BY_TAG
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depends on MN10300_CACHE_ENABLED
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help
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This determines the method by which CPU cache flushing and
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invalidation is performed.
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config MN10300_CACHE_MANAGE_BY_TAG
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bool "Use the cache tag registers directly"
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endchoice
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config MN10300_CACHE_INV_BY_TAG
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def_bool y if MN10300_CACHE_MANAGE_BY_TAG && MN10300_CACHE_ENABLED
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config MN10300_CACHE_FLUSH_BY_TAG
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def_bool y if MN10300_CACHE_MANAGE_BY_TAG && MN10300_CACHE_WBACK
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