linux/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml
Linus Torvalds ff61bc81b3 Pin control bulk changes for the v5.18 kernel cycle
No core changes this time. Just new driver code and improvements!
 
 New drivers:
 
 - New driver for the Broadcom BCM4908 SoC.
 
 - New subdriver for Tesla FSD (Full Self Driving) SoC, a
   derivative of the Samsung Exynos pin control driver.
 
 - New driver for the Amlogic Meson S4 SoC.
 
 - New driver for the Sunplus SP7021 SoC.
 
 - New driver for the Microsemi Ocelot family ServalT SoC.
 
 - New subdriver for Intel Alder Lake-M SoC.
 
 - New subdriver for Intel Ice Lake-N SoC, including PCH support.
 
 - New subdriver for Renesas R8A779F0 SoC.
 
 - New subdriver for Mediatek MT8186 SoC.
 
 - New subdriver for NXP Freescale i.MX93 SoC.
 
 - New driver for Nuvoton WPCM450 SoC.
 
 - New driver for Qualcomm SC8280XP SoC.
 
 Improvements:
 
 - Wakeup support on Samsung Exynos850 and ExynosAutov9.
 
 - Serious and voluminous maintenance cleanup and refactoring in
   the Renesas drivers. Mainly sharing similar data between the
   different SoC subdrivers.
 
 - Qualcomm SM8450 EGPIO support.
 
 - Drive strength support on the Mediatek MT8195.
 
 - Add some missing groups and functions to the Ralink RT2880.
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Merge tag 'pinctrl-v5.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "No core changes this time. Just new driver code and improvements!

  New drivers:

   - New driver for the Broadcom BCM4908 SoC.

   - New subdriver for Tesla FSD (Full Self Driving) SoC, a derivative
     of the Samsung Exynos pin control driver.

   - New driver for the Amlogic Meson S4 SoC.

   - New driver for the Sunplus SP7021 SoC.

   - New driver for the Microsemi Ocelot family ServalT SoC.

   - New subdriver for Intel Alder Lake-M SoC.

   - New subdriver for Intel Ice Lake-N SoC, including PCH support.

   - New subdriver for Renesas R8A779F0 SoC.

   - New subdriver for Mediatek MT8186 SoC.

   - New subdriver for NXP Freescale i.MX93 SoC.

   - New driver for Nuvoton WPCM450 SoC.

   - New driver for Qualcomm SC8280XP SoC.

  Improvements:

   - Wakeup support on Samsung Exynos850 and ExynosAutov9.

   - Serious and voluminous maintenance cleanup and refactoring in the
     Renesas drivers. Mainly sharing similar data between the different
     SoC subdrivers.

   - Qualcomm SM8450 EGPIO support.

   - Drive strength support on the Mediatek MT8195.

   - Add some missing groups and functions to the Ralink RT2880"

* tag 'pinctrl-v5.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (188 commits)
  pinctrl: mediatek: common-v1: fix semicolon.cocci warnings
  pinctrl: nuvoton: wpcm450: Fix build error without OF
  pinctrl: qcom-pmic-gpio: Add support for pm8450
  dt-bindings: pinctrl: aspeed: Update gfx node in example
  dt-bindings: pinctrl: rt2880: add missing pin groups and functions
  pinctrl: ingenic: Fix regmap on X series SoCs
  pinctrl: nuvoton: Fix return value check in wpcm450_gpio_register()
  pinctrl: nuvoton: wpcm450: off by one in wpcm450_gpio_register()
  pinctrl: nuvoton: wpcm450: select GENERIC_PINCTRL_GROUPS
  pinctrl: nuvoton: Fix sparse warning
  pinctrl: mediatek: mt8186: Account for probe refactoring
  pinctrl: mediatek: common-v1: Commonize spec_ies_smt_set callback
  pinctrl: mediatek: common-v1: Commonize spec_pupd callback
  pinctrl: mediatek: common-v1: Use common probe function
  pinctrl: mediatek: common-v1: Add common probe function
  pinctrl: mediatek: paris: Unify probe function by using OF match data
  pinctrl/rockchip: Add missing of_node_put() in rockchip_pinctrl_probe
  pinctrl: nomadik: Add missing of_node_put() in nmk_pinctrl_probe
  pinctrl: berlin: fix error return code of berlin_pinctrl_build_state()
  pinctrl: qcom: Introduce sc8280xp TLMM driver
  ...
2022-03-28 11:52:53 -07:00

149 lines
4.8 KiB
YAML

# SPDX-License-Identifier: GPL-2.0-or-later
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/aspeed,ast2500-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ASPEED AST2500 Pin Controller
maintainers:
- Andrew Jeffery <andrew@aj.id.au>
description: |+
The pin controller node should be the child of a syscon node with the
required property:
- compatible: Should be one of the following:
"aspeed,ast2500-scu", "syscon", "simple-mfd"
"aspeed,g5-scu", "syscon", "simple-mfd"
Refer to the the bindings described in
Documentation/devicetree/bindings/mfd/syscon.yaml
properties:
compatible:
const: aspeed,ast2500-pinctrl
reg:
maxItems: 2
aspeed,external-nodes:
minItems: 2
maxItems: 2
items:
maxItems: 1
$ref: /schemas/types.yaml#/definitions/phandle-array
description: |
A cell of phandles to external controller nodes:
0: compatible with "aspeed,ast2500-gfx", "syscon"
1: compatible with "aspeed,ast2500-lhc", "syscon"
patternProperties:
'^.*$':
if:
type: object
then:
patternProperties:
"^function|groups$":
$ref: "/schemas/types.yaml#/definitions/string"
enum: [ ACPI, ADC0, ADC1, ADC10, ADC11, ADC12, ADC13, ADC14, ADC15,
ADC2, ADC3, ADC4, ADC5, ADC6, ADC7, ADC8, ADC9, BMCINT, DDCCLK, DDCDAT,
ESPI, FWSPICS1, FWSPICS2, GPID0, GPID2, GPID4, GPID6, GPIE0, GPIE2,
GPIE4, GPIE6, I2C10, I2C11, I2C12, I2C13, I2C14, I2C3, I2C4, I2C5,
I2C6, I2C7, I2C8, I2C9, LAD0, LAD1, LAD2, LAD3, LCLK, LFRAME, LPCHC,
LPCPD, LPCPLUS, LPCPME, LPCRST, LPCSMI, LSIRQ, MAC1LINK, MAC2LINK,
MDIO1, MDIO2, NCTS1, NCTS2, NCTS3, NCTS4, NDCD1, NDCD2, NDCD3, NDCD4,
NDSR1, NDSR2, NDSR3, NDSR4, NDTR1, NDTR2, NDTR3, NDTR4, NRI1, NRI2,
NRI3, NRI4, NRTS1, NRTS2, NRTS3, NRTS4, OSCCLK, PEWAKE, PNOR, PWM0,
PWM1, PWM2, PWM3, PWM4, PWM5, PWM6, PWM7, RGMII1, RGMII2, RMII1,
RMII2, RXD1, RXD2, RXD3, RXD4, SALT1, SALT10, SALT11, SALT12, SALT13,
SALT14, SALT2, SALT3, SALT4, SALT5, SALT6, SALT7, SALT8, SALT9, SCL1,
SCL2, SD1, SD2, SDA1, SDA2, SGPS1, SGPS2, SIOONCTRL, SIOPBI, SIOPBO,
SIOPWREQ, SIOPWRGD, SIOS3, SIOS5, SIOSCI, SPI1, SPI1CS1, SPI1DEBUG,
SPI1PASSTHRU, SPI2CK, SPI2CS0, SPI2CS1, SPI2MISO, SPI2MOSI, TIMER3,
TIMER4, TIMER5, TIMER6, TIMER7, TIMER8, TXD1, TXD2, TXD3, TXD4, UART6,
USB11BHID, USB2AD, USB2AH, USB2BD, USB2BH, USBCKI, VGABIOSROM, VGAHS,
VGAVS, VPI24, VPO, WDTRST1, WDTRST2]
allOf:
- $ref: "pinctrl.yaml#"
required:
- compatible
- aspeed,external-nodes
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/aspeed-clock.h>
apb {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
syscon: scu@1e6e2000 {
compatible = "aspeed,ast2500-scu", "syscon", "simple-mfd";
reg = <0x1e6e2000 0x1a8>;
#clock-cells = <1>;
#reset-cells = <1>;
pinctrl: pinctrl {
compatible = "aspeed,ast2500-pinctrl";
aspeed,external-nodes = <&gfx>, <&lhc>;
pinctrl_i2c3_default: i2c3_default {
function = "I2C3";
groups = "I2C3";
};
pinctrl_gpioh0_unbiased_default: gpioh0 {
pins = "A18";
bias-disable;
};
};
};
gfx: display@1e6e6000 {
compatible = "aspeed,ast2500-gfx", "syscon";
reg = <0x1e6e6000 0x1000>;
reg-io-width = <4>;
clocks = <&syscon ASPEED_CLK_GATE_D1CLK>;
resets = <&syscon ASPEED_RESET_CRT1>;
interrupts = <0x19>;
syscon = <&syscon>;
memory-region = <&gfx_memory>;
};
};
lpc: lpc@1e789000 {
compatible = "aspeed,ast2500-lpc", "simple-mfd";
reg = <0x1e789000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x1e789000 0x1000>;
lpc_host: lpc-host@80 {
compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
reg = <0x80 0x1e0>;
reg-io-width = <4>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x80 0x1e0>;
lhc: lhc@20 {
compatible = "aspeed,ast2500-lhc";
reg = <0x20 0x24>, <0x48 0x8>;
};
};
};
gfx_memory: framebuffer {
size = <0x01000000>;
alignment = <0x01000000>;
compatible = "shared-dma-pool";
reusable;
};