No core changes this time. Just new driver code and improvements! New drivers: - New driver for the Broadcom BCM4908 SoC. - New subdriver for Tesla FSD (Full Self Driving) SoC, a derivative of the Samsung Exynos pin control driver. - New driver for the Amlogic Meson S4 SoC. - New driver for the Sunplus SP7021 SoC. - New driver for the Microsemi Ocelot family ServalT SoC. - New subdriver for Intel Alder Lake-M SoC. - New subdriver for Intel Ice Lake-N SoC, including PCH support. - New subdriver for Renesas R8A779F0 SoC. - New subdriver for Mediatek MT8186 SoC. - New subdriver for NXP Freescale i.MX93 SoC. - New driver for Nuvoton WPCM450 SoC. - New driver for Qualcomm SC8280XP SoC. Improvements: - Wakeup support on Samsung Exynos850 and ExynosAutov9. - Serious and voluminous maintenance cleanup and refactoring in the Renesas drivers. Mainly sharing similar data between the different SoC subdrivers. - Qualcomm SM8450 EGPIO support. - Drive strength support on the Mediatek MT8195. - Add some missing groups and functions to the Ralink RT2880. -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmJBsSwACgkQQRCzN7AZ XXOoVhAAhHW2FSXB8ud1mdyuN3CswMSiWrZqC8nveznHMcddzsDvZsGsAP8x6fKi 1CgTXDQblA/plpxqORvBDA8Ji9+z9NAilIMds1ZcMbPjpY1l63uD5VhWq7tpPN1H ALnJAhc4rl1fkJ01U5sTtHJ8xibjpN690ZCrfzNwdLOQAUvXJ22zuyuIcSBFiSMv ij4E2fejOj0ZN7rzb8xTxcaSWUrj5Kci5Eaq6yi/clKHaOrrV5r/tX9yo7uWF3mi 6UX/1IioougtMF2bhsoodQE5E5XN8Hjm2+VWULxBCsKjI1gKY/NR2GXeaHHJve8B do3Y45cU+zZSWVo4mmlf/Z3+4npIQlMFe8LvDmBvb3ZopcbapuGiOSzYxT6aZA/z WtGDDIaECcNF/dJCHwRugAsG5OhT0AYyNblMxsmW+ARoTocMlYPG8Jq4KEmIoIEz m+UArJEe8asQlk4ebK/e0x2hbywgfN02ILO8OygpXpwsHAyx7pjDk7SABkzrAQLg vTpI1i7q1hsYyeTm9RXJJd2VTe9fpYLTgjTa5bnqBQNcsyEd5o9QtH/IwARS/NP7 nNlZLUIUsOa782O6N4oT5JGb96a3cMxHv+hAIKcwhxK/54IYrGh+/BAORnfoe0Vo h6pwKoUVE+L70t0RfmVqYK0EX6zsWSnb1NNNJFM+uLLpfFnx+1U= =TY4V -----END PGP SIGNATURE----- Merge tag 'pinctrl-v5.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "No core changes this time. Just new driver code and improvements! New drivers: - New driver for the Broadcom BCM4908 SoC. - New subdriver for Tesla FSD (Full Self Driving) SoC, a derivative of the Samsung Exynos pin control driver. - New driver for the Amlogic Meson S4 SoC. - New driver for the Sunplus SP7021 SoC. - New driver for the Microsemi Ocelot family ServalT SoC. - New subdriver for Intel Alder Lake-M SoC. - New subdriver for Intel Ice Lake-N SoC, including PCH support. - New subdriver for Renesas R8A779F0 SoC. - New subdriver for Mediatek MT8186 SoC. - New subdriver for NXP Freescale i.MX93 SoC. - New driver for Nuvoton WPCM450 SoC. - New driver for Qualcomm SC8280XP SoC. Improvements: - Wakeup support on Samsung Exynos850 and ExynosAutov9. - Serious and voluminous maintenance cleanup and refactoring in the Renesas drivers. Mainly sharing similar data between the different SoC subdrivers. - Qualcomm SM8450 EGPIO support. - Drive strength support on the Mediatek MT8195. - Add some missing groups and functions to the Ralink RT2880" * tag 'pinctrl-v5.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (188 commits) pinctrl: mediatek: common-v1: fix semicolon.cocci warnings pinctrl: nuvoton: wpcm450: Fix build error without OF pinctrl: qcom-pmic-gpio: Add support for pm8450 dt-bindings: pinctrl: aspeed: Update gfx node in example dt-bindings: pinctrl: rt2880: add missing pin groups and functions pinctrl: ingenic: Fix regmap on X series SoCs pinctrl: nuvoton: Fix return value check in wpcm450_gpio_register() pinctrl: nuvoton: wpcm450: off by one in wpcm450_gpio_register() pinctrl: nuvoton: wpcm450: select GENERIC_PINCTRL_GROUPS pinctrl: nuvoton: Fix sparse warning pinctrl: mediatek: mt8186: Account for probe refactoring pinctrl: mediatek: common-v1: Commonize spec_ies_smt_set callback pinctrl: mediatek: common-v1: Commonize spec_pupd callback pinctrl: mediatek: common-v1: Use common probe function pinctrl: mediatek: common-v1: Add common probe function pinctrl: mediatek: paris: Unify probe function by using OF match data pinctrl/rockchip: Add missing of_node_put() in rockchip_pinctrl_probe pinctrl: nomadik: Add missing of_node_put() in nmk_pinctrl_probe pinctrl: berlin: fix error return code of berlin_pinctrl_build_state() pinctrl: qcom: Introduce sc8280xp TLMM driver ...
149 lines
4.8 KiB
YAML
149 lines
4.8 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-or-later
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pinctrl/aspeed,ast2500-pinctrl.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: ASPEED AST2500 Pin Controller
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maintainers:
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- Andrew Jeffery <andrew@aj.id.au>
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description: |+
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The pin controller node should be the child of a syscon node with the
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required property:
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- compatible: Should be one of the following:
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"aspeed,ast2500-scu", "syscon", "simple-mfd"
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"aspeed,g5-scu", "syscon", "simple-mfd"
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Refer to the the bindings described in
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Documentation/devicetree/bindings/mfd/syscon.yaml
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properties:
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compatible:
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const: aspeed,ast2500-pinctrl
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reg:
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maxItems: 2
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aspeed,external-nodes:
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minItems: 2
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maxItems: 2
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items:
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maxItems: 1
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$ref: /schemas/types.yaml#/definitions/phandle-array
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description: |
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A cell of phandles to external controller nodes:
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0: compatible with "aspeed,ast2500-gfx", "syscon"
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1: compatible with "aspeed,ast2500-lhc", "syscon"
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patternProperties:
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'^.*$':
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if:
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type: object
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then:
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patternProperties:
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"^function|groups$":
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$ref: "/schemas/types.yaml#/definitions/string"
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enum: [ ACPI, ADC0, ADC1, ADC10, ADC11, ADC12, ADC13, ADC14, ADC15,
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ADC2, ADC3, ADC4, ADC5, ADC6, ADC7, ADC8, ADC9, BMCINT, DDCCLK, DDCDAT,
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ESPI, FWSPICS1, FWSPICS2, GPID0, GPID2, GPID4, GPID6, GPIE0, GPIE2,
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GPIE4, GPIE6, I2C10, I2C11, I2C12, I2C13, I2C14, I2C3, I2C4, I2C5,
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I2C6, I2C7, I2C8, I2C9, LAD0, LAD1, LAD2, LAD3, LCLK, LFRAME, LPCHC,
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LPCPD, LPCPLUS, LPCPME, LPCRST, LPCSMI, LSIRQ, MAC1LINK, MAC2LINK,
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MDIO1, MDIO2, NCTS1, NCTS2, NCTS3, NCTS4, NDCD1, NDCD2, NDCD3, NDCD4,
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NDSR1, NDSR2, NDSR3, NDSR4, NDTR1, NDTR2, NDTR3, NDTR4, NRI1, NRI2,
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NRI3, NRI4, NRTS1, NRTS2, NRTS3, NRTS4, OSCCLK, PEWAKE, PNOR, PWM0,
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PWM1, PWM2, PWM3, PWM4, PWM5, PWM6, PWM7, RGMII1, RGMII2, RMII1,
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RMII2, RXD1, RXD2, RXD3, RXD4, SALT1, SALT10, SALT11, SALT12, SALT13,
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SALT14, SALT2, SALT3, SALT4, SALT5, SALT6, SALT7, SALT8, SALT9, SCL1,
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SCL2, SD1, SD2, SDA1, SDA2, SGPS1, SGPS2, SIOONCTRL, SIOPBI, SIOPBO,
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SIOPWREQ, SIOPWRGD, SIOS3, SIOS5, SIOSCI, SPI1, SPI1CS1, SPI1DEBUG,
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SPI1PASSTHRU, SPI2CK, SPI2CS0, SPI2CS1, SPI2MISO, SPI2MOSI, TIMER3,
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TIMER4, TIMER5, TIMER6, TIMER7, TIMER8, TXD1, TXD2, TXD3, TXD4, UART6,
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USB11BHID, USB2AD, USB2AH, USB2BD, USB2BH, USBCKI, VGABIOSROM, VGAHS,
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VGAVS, VPI24, VPO, WDTRST1, WDTRST2]
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allOf:
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- $ref: "pinctrl.yaml#"
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required:
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- compatible
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- aspeed,external-nodes
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/aspeed-clock.h>
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apb {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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syscon: scu@1e6e2000 {
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compatible = "aspeed,ast2500-scu", "syscon", "simple-mfd";
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reg = <0x1e6e2000 0x1a8>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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pinctrl: pinctrl {
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compatible = "aspeed,ast2500-pinctrl";
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aspeed,external-nodes = <&gfx>, <&lhc>;
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pinctrl_i2c3_default: i2c3_default {
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function = "I2C3";
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groups = "I2C3";
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};
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pinctrl_gpioh0_unbiased_default: gpioh0 {
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pins = "A18";
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bias-disable;
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};
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};
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};
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gfx: display@1e6e6000 {
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compatible = "aspeed,ast2500-gfx", "syscon";
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reg = <0x1e6e6000 0x1000>;
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reg-io-width = <4>;
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clocks = <&syscon ASPEED_CLK_GATE_D1CLK>;
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resets = <&syscon ASPEED_RESET_CRT1>;
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interrupts = <0x19>;
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syscon = <&syscon>;
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memory-region = <&gfx_memory>;
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};
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};
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lpc: lpc@1e789000 {
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compatible = "aspeed,ast2500-lpc", "simple-mfd";
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reg = <0x1e789000 0x1000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x1e789000 0x1000>;
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lpc_host: lpc-host@80 {
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compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
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reg = <0x80 0x1e0>;
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reg-io-width = <4>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x80 0x1e0>;
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lhc: lhc@20 {
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compatible = "aspeed,ast2500-lhc";
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reg = <0x20 0x24>, <0x48 0x8>;
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};
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};
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};
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gfx_memory: framebuffer {
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size = <0x01000000>;
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alignment = <0x01000000>;
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compatible = "shared-dma-pool";
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reusable;
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};
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