13678f3feb
There is a build error when COMPILE_TEST=y, TI_SCI_PROTOCOL=m,
and RESET_TI_SCI=y:
drivers/reset/reset-ti-sci.o: in function `ti_sci_reset_probe':
reset-ti-sci.c:(.text+0x22c): undefined reference to `devm_ti_sci_get_handle'
Fix this by making RESET_TI_SCI honor the Kconfig setting of
TI_SCI_PROTOCOL when COMPILE_TEST is not set. When COMPILE_TEST is set,
TI_SCI_PROTOCOL must be disabled (=n).
Fixes: a6af504184 ("reset: ti-sci: Allow building under COMPILE_TEST")
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Reported-by: kernel test robot <lkp@intel.com>
Cc: Nishanth Menon <nm@ti.com>
Cc: Tero Kristo <kristo@kernel.org>
Cc: Santosh Shilimkar <ssantosh@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20221030055636.3139-1-rdunlap@infradead.org
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
328 lines
10 KiB
Plaintext
328 lines
10 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0-only
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config ARCH_HAS_RESET_CONTROLLER
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bool
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menuconfig RESET_CONTROLLER
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bool "Reset Controller Support"
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default y if ARCH_HAS_RESET_CONTROLLER
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help
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Generic Reset Controller support.
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This framework is designed to abstract reset handling of devices
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via GPIOs or SoC-internal reset controller modules.
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If unsure, say no.
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if RESET_CONTROLLER
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config RESET_A10SR
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tristate "Altera Arria10 System Resource Reset"
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depends on MFD_ALTERA_A10SR || COMPILE_TEST
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help
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This option enables support for the external reset functions for
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peripheral PHYs on the Altera Arria10 System Resource Chip.
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config RESET_ATH79
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bool "AR71xx Reset Driver" if COMPILE_TEST
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default ATH79
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help
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This enables the ATH79 reset controller driver that supports the
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AR71xx SoC reset controller.
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config RESET_AXS10X
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bool "AXS10x Reset Driver" if COMPILE_TEST
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default ARC_PLAT_AXS10X
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help
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This enables the reset controller driver for AXS10x.
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config RESET_BCM6345
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bool "BCM6345 Reset Controller"
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depends on BMIPS_GENERIC || COMPILE_TEST
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default BMIPS_GENERIC
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help
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This enables the reset controller driver for BCM6345 SoCs.
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config RESET_BERLIN
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tristate "Berlin Reset Driver"
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depends on ARCH_BERLIN || COMPILE_TEST
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default m if ARCH_BERLIN
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help
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This enables the reset controller driver for Marvell Berlin SoCs.
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config RESET_BRCMSTB
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tristate "Broadcom STB reset controller"
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depends on ARCH_BRCMSTB || COMPILE_TEST
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default ARCH_BRCMSTB
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help
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This enables the reset controller driver for Broadcom STB SoCs using
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a SUN_TOP_CTRL_SW_INIT style controller.
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config RESET_BRCMSTB_RESCAL
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tristate "Broadcom STB RESCAL reset controller"
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depends on HAS_IOMEM
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depends on ARCH_BRCMSTB || COMPILE_TEST
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default ARCH_BRCMSTB
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help
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This enables the RESCAL reset controller for SATA, PCIe0, or PCIe1 on
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BCM7216.
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config RESET_HSDK
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bool "Synopsys HSDK Reset Driver"
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depends on HAS_IOMEM
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depends on ARC_SOC_HSDK || COMPILE_TEST
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help
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This enables the reset controller driver for HSDK board.
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config RESET_IMX7
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tristate "i.MX7/8 Reset Driver"
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depends on HAS_IOMEM
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depends on SOC_IMX7D || (ARM64 && ARCH_MXC) || COMPILE_TEST
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default y if SOC_IMX7D
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select MFD_SYSCON
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help
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This enables the reset controller driver for i.MX7 SoCs.
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config RESET_INTEL_GW
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bool "Intel Reset Controller Driver"
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depends on X86 || COMPILE_TEST
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depends on OF && HAS_IOMEM
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select REGMAP_MMIO
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help
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This enables the reset controller driver for Intel Gateway SoCs.
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Say Y to control the reset signals provided by reset controller.
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Otherwise, say N.
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config RESET_K210
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bool "Reset controller driver for Canaan Kendryte K210 SoC"
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depends on (SOC_CANAAN || COMPILE_TEST) && OF
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select MFD_SYSCON
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default SOC_CANAAN
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help
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Support for the Canaan Kendryte K210 RISC-V SoC reset controller.
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Say Y if you want to control reset signals provided by this
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controller.
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config RESET_LANTIQ
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bool "Lantiq XWAY Reset Driver" if COMPILE_TEST
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default SOC_TYPE_XWAY
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help
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This enables the reset controller driver for Lantiq / Intel XWAY SoCs.
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config RESET_LPC18XX
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bool "LPC18xx/43xx Reset Driver" if COMPILE_TEST
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default ARCH_LPC18XX
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help
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This enables the reset controller driver for NXP LPC18xx/43xx SoCs.
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config RESET_MCHP_SPARX5
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bool "Microchip Sparx5 reset driver"
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depends on ARCH_SPARX5 || SOC_LAN966 || COMPILE_TEST
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default y if SPARX5_SWITCH
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select MFD_SYSCON
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help
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This driver supports switch core reset for the Microchip Sparx5 SoC.
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config RESET_MESON
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tristate "Meson Reset Driver"
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depends on ARCH_MESON || COMPILE_TEST
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default ARCH_MESON
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help
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This enables the reset driver for Amlogic Meson SoCs.
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config RESET_MESON_AUDIO_ARB
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tristate "Meson Audio Memory Arbiter Reset Driver"
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depends on ARCH_MESON || COMPILE_TEST
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help
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This enables the reset driver for Audio Memory Arbiter of
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Amlogic's A113 based SoCs
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config RESET_NPCM
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bool "NPCM BMC Reset Driver" if COMPILE_TEST
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default ARCH_NPCM
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help
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This enables the reset controller driver for Nuvoton NPCM
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BMC SoCs.
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config RESET_OXNAS
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bool
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config RESET_PISTACHIO
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bool "Pistachio Reset Driver"
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depends on MIPS || COMPILE_TEST
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help
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This enables the reset driver for ImgTec Pistachio SoCs.
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config RESET_POLARFIRE_SOC
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bool "Microchip PolarFire SoC (MPFS) Reset Driver"
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depends on AUXILIARY_BUS && MCHP_CLK_MPFS
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default MCHP_CLK_MPFS
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help
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This driver supports peripheral reset for the Microchip PolarFire SoC
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config RESET_QCOM_AOSS
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tristate "Qcom AOSS Reset Driver"
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depends on ARCH_QCOM || COMPILE_TEST
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help
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This enables the AOSS (always on subsystem) reset driver
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for Qualcomm SDM845 SoCs. Say Y if you want to control
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reset signals provided by AOSS for Modem, Venus, ADSP,
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GPU, Camera, Wireless, Display subsystem. Otherwise, say N.
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config RESET_QCOM_PDC
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tristate "Qualcomm PDC Reset Driver"
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depends on ARCH_QCOM || COMPILE_TEST
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help
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This enables the PDC (Power Domain Controller) reset driver
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for Qualcomm Technologies Inc SDM845 SoCs. Say Y if you want
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to control reset signals provided by PDC for Modem, Compute,
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Display, GPU, Debug, AOP, Sensors, Audio, SP and APPS.
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config RESET_RASPBERRYPI
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tristate "Raspberry Pi 4 Firmware Reset Driver"
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depends on RASPBERRYPI_FIRMWARE || (RASPBERRYPI_FIRMWARE=n && COMPILE_TEST)
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default USB_XHCI_PCI
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help
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Raspberry Pi 4's co-processor controls some of the board's HW
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initialization process, but it's up to Linux to trigger it when
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relevant. This driver provides a reset controller capable of
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interfacing with RPi4's co-processor and model these firmware
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initialization routines as reset lines.
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config RESET_RZG2L_USBPHY_CTRL
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tristate "Renesas RZ/G2L USBPHY control driver"
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depends on ARCH_RZG2L || COMPILE_TEST
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help
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Support for USBPHY Control found on RZ/G2L family. It mainly
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controls reset and power down of the USB/PHY.
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config RESET_SCMI
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tristate "Reset driver controlled via ARM SCMI interface"
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depends on ARM_SCMI_PROTOCOL || COMPILE_TEST
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default ARM_SCMI_PROTOCOL
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help
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This driver provides support for reset signal/domains that are
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controlled by firmware that implements the SCMI interface.
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This driver uses SCMI Message Protocol to interact with the
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firmware controlling all the reset signals.
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config RESET_SIMPLE
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bool "Simple Reset Controller Driver" if COMPILE_TEST || EXPERT
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default ARCH_ASPEED || ARCH_BCMBCA || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || (ARCH_INTEL_SOCFPGA && ARM64) || ARCH_SUNXI || ARC
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depends on HAS_IOMEM
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help
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This enables a simple reset controller driver for reset lines that
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that can be asserted and deasserted by toggling bits in a contiguous,
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exclusive register space.
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Currently this driver supports:
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- Altera SoCFPGAs
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- ASPEED BMC SoCs
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- Bitmain BM1880 SoC
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- Realtek SoCs
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- RCC reset controller in STM32 MCUs
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- Allwinner SoCs
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- SiFive FU740 SoCs
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config RESET_SOCFPGA
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bool "SoCFPGA Reset Driver" if COMPILE_TEST && (!ARM || !ARCH_INTEL_SOCFPGA)
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default ARM && ARCH_INTEL_SOCFPGA
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select RESET_SIMPLE
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help
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This enables the reset driver for the SoCFPGA ARMv7 platforms. This
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driver gets initialized early during platform init calls.
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config RESET_STARFIVE_JH7100
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bool "StarFive JH7100 Reset Driver"
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depends on SOC_STARFIVE || COMPILE_TEST
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default SOC_STARFIVE
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help
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This enables the reset controller driver for the StarFive JH7100 SoC.
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config RESET_SUNPLUS
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bool "Sunplus SoCs Reset Driver" if COMPILE_TEST
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default ARCH_SUNPLUS
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help
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This enables the reset driver support for Sunplus SoCs.
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The reset lines that can be asserted and deasserted by toggling bits
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in a contiguous, exclusive register space. The register is HIWORD_MASKED,
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which means each register holds 16 reset lines.
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config RESET_SUNXI
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bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI
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default ARCH_SUNXI
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select RESET_SIMPLE
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help
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This enables the reset driver for Allwinner SoCs.
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config RESET_TI_SCI
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tristate "TI System Control Interface (TI-SCI) reset driver"
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depends on TI_SCI_PROTOCOL || (COMPILE_TEST && TI_SCI_PROTOCOL=n)
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help
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This enables the reset driver support over TI System Control Interface
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available on some new TI's SoCs. If you wish to use reset resources
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managed by the TI System Controller, say Y here. Otherwise, say N.
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config RESET_TI_SYSCON
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tristate "TI SYSCON Reset Driver"
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depends on HAS_IOMEM
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select MFD_SYSCON
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help
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This enables the reset driver support for TI devices with
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memory-mapped reset registers as part of a syscon device node. If
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you wish to use the reset framework for such memory-mapped devices,
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say Y here. Otherwise, say N.
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config RESET_TI_TPS380X
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tristate "TI TPS380x Reset Driver"
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select GPIOLIB
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help
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This enables the reset driver support for TI TPS380x devices. If
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you wish to use the reset framework for such devices, say Y here.
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Otherwise, say N.
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config RESET_TN48M_CPLD
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tristate "Delta Networks TN48M switch CPLD reset controller"
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depends on MFD_TN48M_CPLD || COMPILE_TEST
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default MFD_TN48M_CPLD
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help
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This enables the reset controller driver for the Delta TN48M CPLD.
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It provides reset signals for Armada 7040 and 385 SoC-s, Alleycat 3X
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switch MAC-s, Alaska OOB ethernet PHY, Quad Alaska ethernet PHY-s and
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Microchip PD69200 PoE PSE controller.
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This driver can also be built as a module. If so, the module will be
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called reset-tn48m.
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config RESET_UNIPHIER
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tristate "Reset controller driver for UniPhier SoCs"
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depends on ARCH_UNIPHIER || COMPILE_TEST
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depends on OF && MFD_SYSCON
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default ARCH_UNIPHIER
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help
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Support for reset controllers on UniPhier SoCs.
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Say Y if you want to control reset signals provided by System Control
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block, Media I/O block, Peripheral Block.
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config RESET_UNIPHIER_GLUE
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tristate "Reset driver in glue layer for UniPhier SoCs"
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depends on (ARCH_UNIPHIER || COMPILE_TEST) && OF
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default ARCH_UNIPHIER
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select RESET_SIMPLE
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help
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Support for peripheral core reset included in its own glue layer
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on UniPhier SoCs. Say Y if you want to control reset signals
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provided by the glue layer.
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config RESET_ZYNQ
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bool "ZYNQ Reset Driver" if COMPILE_TEST
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default ARCH_ZYNQ
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help
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This enables the reset controller driver for Xilinx Zynq SoCs.
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source "drivers/reset/sti/Kconfig"
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source "drivers/reset/hisilicon/Kconfig"
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source "drivers/reset/tegra/Kconfig"
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endif
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