eefc27ea14
The rt5682 can only support single register read and write operations so does not benefit from block writes. This means it gets no benefit from using the rbtree register cache over the maple tree register cache so convert it to use maple trees instead, it is more modern. Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20230609-asoc-rt-maple-v1-16-729c6553cdcf@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
346 lines
9.2 KiB
C
346 lines
9.2 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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//
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// rt5682.c -- RT5682 ALSA SoC audio component driver
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//
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// Copyright 2018 Realtek Semiconductor Corp.
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// Author: Bard Liao <bardliao@realtek.com>
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//
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/pm.h>
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#include <linux/i2c.h>
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#include <linux/platform_device.h>
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#include <linux/spi/spi.h>
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#include <linux/acpi.h>
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#include <linux/gpio.h>
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#include <linux/of_gpio.h>
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#include <linux/mutex.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/jack.h>
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#include <sound/soc.h>
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#include <sound/soc-dapm.h>
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#include <sound/initval.h>
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#include <sound/tlv.h>
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#include <sound/rt5682.h>
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#include "rl6231.h"
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#include "rt5682.h"
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static const struct rt5682_platform_data i2s_default_platform_data = {
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.dmic1_data_pin = RT5682_DMIC1_DATA_GPIO2,
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.dmic1_clk_pin = RT5682_DMIC1_CLK_GPIO3,
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.jd_src = RT5682_JD1,
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.btndet_delay = 16,
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.dai_clk_names[RT5682_DAI_WCLK_IDX] = "rt5682-dai-wclk",
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.dai_clk_names[RT5682_DAI_BCLK_IDX] = "rt5682-dai-bclk",
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};
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static const struct regmap_config rt5682_regmap = {
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.reg_bits = 16,
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.val_bits = 16,
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.max_register = RT5682_I2C_MODE,
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.volatile_reg = rt5682_volatile_register,
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.readable_reg = rt5682_readable_register,
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.cache_type = REGCACHE_MAPLE,
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.reg_defaults = rt5682_reg,
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.num_reg_defaults = RT5682_REG_NUM,
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.use_single_read = true,
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.use_single_write = true,
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};
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static void rt5682_jd_check_handler(struct work_struct *work)
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{
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struct rt5682_priv *rt5682 = container_of(work, struct rt5682_priv,
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jd_check_work.work);
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if (snd_soc_component_read(rt5682->component, RT5682_AJD1_CTRL) & RT5682_JDH_RS_MASK)
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/* jack out */
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mod_delayed_work(system_power_efficient_wq,
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&rt5682->jack_detect_work, 0);
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else
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schedule_delayed_work(&rt5682->jd_check_work, 500);
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}
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static irqreturn_t rt5682_irq(int irq, void *data)
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{
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struct rt5682_priv *rt5682 = data;
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mod_delayed_work(system_power_efficient_wq,
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&rt5682->jack_detect_work, msecs_to_jiffies(rt5682->irq_work_delay_time));
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return IRQ_HANDLED;
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}
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static struct snd_soc_dai_driver rt5682_dai[] = {
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{
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.name = "rt5682-aif1",
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.id = RT5682_AIF1,
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.playback = {
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.stream_name = "AIF1 Playback",
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.channels_min = 1,
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.channels_max = 2,
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.rates = RT5682_STEREO_RATES,
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.formats = RT5682_FORMATS,
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},
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.capture = {
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.stream_name = "AIF1 Capture",
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.channels_min = 1,
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.channels_max = 2,
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.rates = RT5682_STEREO_RATES,
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.formats = RT5682_FORMATS,
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},
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.ops = &rt5682_aif1_dai_ops,
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},
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{
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.name = "rt5682-aif2",
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.id = RT5682_AIF2,
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.capture = {
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.stream_name = "AIF2 Capture",
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.channels_min = 1,
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.channels_max = 2,
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.rates = RT5682_STEREO_RATES,
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.formats = RT5682_FORMATS,
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},
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.ops = &rt5682_aif2_dai_ops,
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},
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};
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static void rt5682_i2c_disable_regulators(void *data)
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{
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struct rt5682_priv *rt5682 = data;
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regulator_bulk_disable(ARRAY_SIZE(rt5682->supplies), rt5682->supplies);
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}
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static int rt5682_i2c_probe(struct i2c_client *i2c)
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{
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struct rt5682_platform_data *pdata = dev_get_platdata(&i2c->dev);
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struct rt5682_priv *rt5682;
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int i, ret;
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unsigned int val;
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rt5682 = devm_kzalloc(&i2c->dev, sizeof(struct rt5682_priv),
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GFP_KERNEL);
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if (!rt5682)
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return -ENOMEM;
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i2c_set_clientdata(i2c, rt5682);
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rt5682->i2c_dev = &i2c->dev;
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rt5682->pdata = i2s_default_platform_data;
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if (pdata)
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rt5682->pdata = *pdata;
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else
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rt5682_parse_dt(rt5682, &i2c->dev);
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rt5682->regmap = devm_regmap_init_i2c(i2c, &rt5682_regmap);
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if (IS_ERR(rt5682->regmap)) {
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ret = PTR_ERR(rt5682->regmap);
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dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
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ret);
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return ret;
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}
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for (i = 0; i < ARRAY_SIZE(rt5682->supplies); i++)
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rt5682->supplies[i].supply = rt5682_supply_names[i];
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ret = devm_regulator_bulk_get(&i2c->dev, ARRAY_SIZE(rt5682->supplies),
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rt5682->supplies);
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if (ret) {
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dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret);
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return ret;
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}
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ret = devm_add_action_or_reset(&i2c->dev, rt5682_i2c_disable_regulators,
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rt5682);
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if (ret)
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return ret;
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ret = regulator_bulk_enable(ARRAY_SIZE(rt5682->supplies),
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rt5682->supplies);
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if (ret) {
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dev_err(&i2c->dev, "Failed to enable supplies: %d\n", ret);
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return ret;
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}
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if (gpio_is_valid(rt5682->pdata.ldo1_en)) {
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if (devm_gpio_request_one(&i2c->dev, rt5682->pdata.ldo1_en,
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GPIOF_OUT_INIT_HIGH, "rt5682"))
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dev_err(&i2c->dev, "Fail gpio_request gpio_ldo\n");
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}
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/* Sleep for 300 ms miniumum */
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usleep_range(300000, 350000);
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regmap_write(rt5682->regmap, RT5682_I2C_MODE, 0x1);
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usleep_range(10000, 15000);
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regmap_read(rt5682->regmap, RT5682_DEVICE_ID, &val);
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if (val != DEVICE_ID) {
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dev_err(&i2c->dev,
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"Device with ID register %x is not rt5682\n", val);
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return -ENODEV;
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}
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mutex_init(&rt5682->calibrate_mutex);
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rt5682_calibrate(rt5682);
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rt5682_apply_patch_list(rt5682, &i2c->dev);
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regmap_write(rt5682->regmap, RT5682_DEPOP_1, 0x0000);
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/* DMIC pin*/
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if (rt5682->pdata.dmic1_data_pin != RT5682_DMIC1_NULL) {
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switch (rt5682->pdata.dmic1_data_pin) {
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case RT5682_DMIC1_DATA_GPIO2: /* share with LRCK2 */
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regmap_update_bits(rt5682->regmap, RT5682_DMIC_CTRL_1,
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RT5682_DMIC_1_DP_MASK, RT5682_DMIC_1_DP_GPIO2);
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regmap_update_bits(rt5682->regmap, RT5682_GPIO_CTRL_1,
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RT5682_GP2_PIN_MASK, RT5682_GP2_PIN_DMIC_SDA);
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break;
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case RT5682_DMIC1_DATA_GPIO5: /* share with DACDAT1 */
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regmap_update_bits(rt5682->regmap, RT5682_DMIC_CTRL_1,
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RT5682_DMIC_1_DP_MASK, RT5682_DMIC_1_DP_GPIO5);
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regmap_update_bits(rt5682->regmap, RT5682_GPIO_CTRL_1,
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RT5682_GP5_PIN_MASK, RT5682_GP5_PIN_DMIC_SDA);
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break;
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default:
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dev_warn(&i2c->dev, "invalid DMIC_DAT pin\n");
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break;
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}
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switch (rt5682->pdata.dmic1_clk_pin) {
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case RT5682_DMIC1_CLK_GPIO1: /* share with IRQ */
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regmap_update_bits(rt5682->regmap, RT5682_GPIO_CTRL_1,
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RT5682_GP1_PIN_MASK, RT5682_GP1_PIN_DMIC_CLK);
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break;
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case RT5682_DMIC1_CLK_GPIO3: /* share with BCLK2 */
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regmap_update_bits(rt5682->regmap, RT5682_GPIO_CTRL_1,
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RT5682_GP3_PIN_MASK, RT5682_GP3_PIN_DMIC_CLK);
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if (rt5682->pdata.dmic_clk_driving_high)
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regmap_update_bits(rt5682->regmap,
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RT5682_PAD_DRIVING_CTRL,
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RT5682_PAD_DRV_GP3_MASK,
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2 << RT5682_PAD_DRV_GP3_SFT);
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break;
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default:
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dev_warn(&i2c->dev, "invalid DMIC_CLK pin\n");
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break;
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}
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}
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regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_1,
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RT5682_LDO1_DVO_MASK | RT5682_HP_DRIVER_MASK,
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RT5682_LDO1_DVO_12 | RT5682_HP_DRIVER_5X);
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regmap_write(rt5682->regmap, RT5682_MICBIAS_2, 0x0080);
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regmap_update_bits(rt5682->regmap, RT5682_GPIO_CTRL_1,
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RT5682_GP4_PIN_MASK | RT5682_GP5_PIN_MASK,
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RT5682_GP4_PIN_ADCDAT1 | RT5682_GP5_PIN_DACDAT1);
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regmap_write(rt5682->regmap, RT5682_TEST_MODE_CTRL_1, 0x0000);
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regmap_update_bits(rt5682->regmap, RT5682_BIAS_CUR_CTRL_8,
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RT5682_HPA_CP_BIAS_CTRL_MASK, RT5682_HPA_CP_BIAS_3UA);
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regmap_update_bits(rt5682->regmap, RT5682_CHARGE_PUMP_1,
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RT5682_CP_CLK_HP_MASK, RT5682_CP_CLK_HP_300KHZ);
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regmap_update_bits(rt5682->regmap, RT5682_HP_CHARGE_PUMP_1,
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RT5682_PM_HP_MASK, RT5682_PM_HP_HV);
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regmap_update_bits(rt5682->regmap, RT5682_DMIC_CTRL_1,
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RT5682_FIFO_CLK_DIV_MASK, RT5682_FIFO_CLK_DIV_2);
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INIT_DELAYED_WORK(&rt5682->jack_detect_work,
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rt5682_jack_detect_handler);
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INIT_DELAYED_WORK(&rt5682->jd_check_work,
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rt5682_jd_check_handler);
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if (i2c->irq) {
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ret = devm_request_threaded_irq(&i2c->dev, i2c->irq, NULL,
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rt5682_irq, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING
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| IRQF_ONESHOT, "rt5682", rt5682);
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if (!ret)
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rt5682->irq = i2c->irq;
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else
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dev_err(&i2c->dev, "Failed to reguest IRQ: %d\n", ret);
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}
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#ifdef CONFIG_COMMON_CLK
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/* Check if MCLK provided */
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rt5682->mclk = devm_clk_get_optional(&i2c->dev, "mclk");
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if (IS_ERR(rt5682->mclk))
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return PTR_ERR(rt5682->mclk);
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/* Register CCF DAI clock control */
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ret = rt5682_register_dai_clks(rt5682);
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if (ret)
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return ret;
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/* Initial setup for CCF */
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rt5682->lrck[RT5682_AIF1] = 48000;
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#endif
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return devm_snd_soc_register_component(&i2c->dev,
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&rt5682_soc_component_dev,
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rt5682_dai, ARRAY_SIZE(rt5682_dai));
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}
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static void rt5682_i2c_shutdown(struct i2c_client *client)
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{
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struct rt5682_priv *rt5682 = i2c_get_clientdata(client);
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disable_irq(client->irq);
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cancel_delayed_work_sync(&rt5682->jack_detect_work);
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cancel_delayed_work_sync(&rt5682->jd_check_work);
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rt5682_reset(rt5682);
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}
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static void rt5682_i2c_remove(struct i2c_client *client)
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{
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rt5682_i2c_shutdown(client);
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}
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static const struct of_device_id rt5682_of_match[] = {
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{.compatible = "realtek,rt5682i"},
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{},
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};
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MODULE_DEVICE_TABLE(of, rt5682_of_match);
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static const struct acpi_device_id rt5682_acpi_match[] = {
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{"10EC5682", 0,},
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{},
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};
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MODULE_DEVICE_TABLE(acpi, rt5682_acpi_match);
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static const struct i2c_device_id rt5682_i2c_id[] = {
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{"rt5682", 0},
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{}
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};
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MODULE_DEVICE_TABLE(i2c, rt5682_i2c_id);
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static struct i2c_driver rt5682_i2c_driver = {
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.driver = {
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.name = "rt5682",
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.of_match_table = rt5682_of_match,
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.acpi_match_table = rt5682_acpi_match,
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.probe_type = PROBE_PREFER_ASYNCHRONOUS,
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},
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.probe = rt5682_i2c_probe,
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.remove = rt5682_i2c_remove,
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.shutdown = rt5682_i2c_shutdown,
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.id_table = rt5682_i2c_id,
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};
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module_i2c_driver(rt5682_i2c_driver);
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MODULE_DESCRIPTION("ASoC RT5682 driver");
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MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
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MODULE_LICENSE("GPL v2");
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