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linux/drivers/phy/qualcomm
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Bjorn Andersson 5894ff12c7 phy: qcom: edp: Perform lane configuration 
The TRANSCIEVER_BIAS_EN, HIGHZ_DRVR_EN and PHY_CFG_1 registers are used
for lane configuration, with the currently hard coded configuration
being a mix of 2 and 4 lane (effectively 2-lane).

Properly implement lane configuration for 1, 2 and 4 lanes.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220810040745.3582985-4-bjorn.andersson@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-08-30 11:01:23 +05:30
..
Kconfig
phy: qcom: Introduce new eDP PHY driver
2021-11-23 10:40:17 +05:30
Makefile
phy: qcom-qmp: switch to new split QMP PHY driver
2022-06-09 23:49:41 +05:30
phy-ath79-usb.c
phy: ath79-usb: Fix the main reset name to match the DT binding
2019-01-16 18:00:57 +05:30
phy-qcom-apq8064-sata.c
phy: qualcomm: convert to devm_platform_ioremap_resource(_byname)
2020-11-16 12:47:47 +05:30
phy-qcom-edp.c
phy: qcom: edp: Perform lane configuration
2022-08-30 11:01:23 +05:30
phy-qcom-ipq806x-sata.c
phy: qualcomm: convert to devm_platform_ioremap_resource(_byname)
2020-11-16 12:47:47 +05:30
phy-qcom-ipq806x-usb.c
drivers: phy: qcom: ipq806x-usb: conver latch function to pool macro
2022-01-24 09:58:12 +05:30
phy-qcom-ipq4019-usb.c
phy: qualcomm: convert to devm_platform_ioremap_resource(_byname)
2020-11-16 12:47:47 +05:30
phy-qcom-pcie2.c
phy: qualcomm: convert to devm_platform_ioremap_resource(_byname)
2020-11-16 12:47:47 +05:30
phy-qcom-qmp-combo.c
phy: qcom-qmp-usb: statify qmp_phy_vreg_l
2022-07-15 17:20:03 +05:30
phy-qcom-qmp-pcie-msm8996.c
phy: qcom-qmp-usb: define QPHY_V2_PCS_PLL_LOCK_CHK_DLY_TIME register
2022-07-07 10:36:01 +05:30
phy-qcom-qmp-pcie-qhp.h
phy: qcom-qmp: move PCIE QHP registers to separate header
2022-07-07 10:36:00 +05:30
phy-qcom-qmp-pcie.c
phy: qcom-qmp-usb: define QPHY_V2_PCS_PLL_LOCK_CHK_DLY_TIME register
2022-07-07 10:36:01 +05:30
phy-qcom-qmp-pcs-misc-v3.h
phy: qcom-qmp: move PCS V3 registers to separate headers
2022-07-07 10:35:59 +05:30
phy-qcom-qmp-pcs-pcie-v4_20.h
phy: qcom-qmp: split allegedly 4.20 and 5.20 PCS registers
2022-07-07 10:36:00 +05:30
phy-qcom-qmp-pcs-pcie-v4.h
phy: qcom-qmp: pcs-pcie-v4: add missing registers
2022-07-07 10:36:01 +05:30
phy-qcom-qmp-pcs-pcie-v5_20.h
phy: qcom-qmp: split allegedly 4.20 and 5.20 PCS registers
2022-07-07 10:36:00 +05:30
phy-qcom-qmp-pcs-pcie-v5.h
phy: qcom-qmp: move PCS V5 registers to separate headers
2022-07-07 10:36:00 +05:30
phy-qcom-qmp-pcs-ufs-v3.h
phy: qcom-qmp: split PCS_UFS V3 symbols to separate header
2022-07-07 10:36:00 +05:30
phy-qcom-qmp-pcs-ufs-v4.h
phy: qcom-qmp: move PCS V4 registers to separate headers
2022-07-07 10:36:00 +05:30
phy-qcom-qmp-pcs-ufs-v5.h
phy: qcom-qmp: move PCS V5 registers to separate headers
2022-07-07 10:36:00 +05:30
phy-qcom-qmp-pcs-usb-v4.h
phy: qcom-qmp: move PCS V4 registers to separate headers
2022-07-07 10:36:00 +05:30
phy-qcom-qmp-pcs-usb-v5.h
phy: qcom-qmp: move PCS V5 registers to separate headers
2022-07-07 10:36:00 +05:30
phy-qcom-qmp-pcs-v2.h
phy: qcom-qmp-usb: define QPHY_V2_PCS_PLL_LOCK_CHK_DLY_TIME register
2022-07-07 10:36:01 +05:30
phy-qcom-qmp-pcs-v3.h
phy: qcom-qmp: pcs-v3: add missing registers
2022-07-07 10:36:01 +05:30
phy-qcom-qmp-pcs-v4_20.h
phy: qcom-qmp: split allegedly 4.20 and 5.20 PCS registers
2022-07-07 10:36:00 +05:30
phy-qcom-qmp-pcs-v4.h
phy: qcom-qmp: move PCS V4 registers to separate headers
2022-07-07 10:36:00 +05:30
phy-qcom-qmp-pcs-v5.h
phy: qcom-qmp: move PCS V5 registers to separate headers
2022-07-07 10:36:00 +05:30
phy-qcom-qmp-qserdes-com-v3.h
phy: qcom-qmp: qserdes-com-v3: add missing registers
2022-07-07 10:36:00 +05:30
phy-qcom-qmp-qserdes-com-v4.h
phy: qcom-qmp: qserdes-com-v4: add missing registers
2022-07-07 10:36:00 +05:30
phy-qcom-qmp-qserdes-com-v5.h
phy: qcom-qmp: qserdes-com-v5: add missing registers
2022-07-07 10:36:00 +05:30
phy-qcom-qmp-qserdes-com.h
phy: qcom-qmp: qserdes-com: add missing registers
2022-07-07 10:36:00 +05:30
phy-qcom-qmp-qserdes-pll.h
phy: qcom-qmp: move QSERDES PLL registers to separate header
2022-07-07 10:35:59 +05:30
phy-qcom-qmp-qserdes-txrx-v3.h
phy: qcom-qmp: qserdes-com-v3: add missing registers
2022-07-07 10:36:00 +05:30
phy-qcom-qmp-qserdes-txrx-v4_20.h
phy: qcom-qmp: split allegedly 4.20 and 5.20 TX/RX registers
2022-07-07 10:36:00 +05:30
phy-qcom-qmp-qserdes-txrx-v4.h
phy: qcom-qmp: qserdes-com-v4: add missing registers
2022-07-07 10:36:00 +05:30
phy-qcom-qmp-qserdes-txrx-v5_20.h
phy: qcom-qmp: split allegedly 4.20 and 5.20 TX/RX registers
2022-07-07 10:36:00 +05:30
phy-qcom-qmp-qserdes-txrx-v5.h
phy: qcom-qmp: qserdes-com-v5: add missing registers
2022-07-07 10:36:00 +05:30
phy-qcom-qmp-qserdes-txrx.h
phy: qcom-qmp: qserdes-com: add missing registers
2022-07-07 10:36:00 +05:30
phy-qcom-qmp-ufs.c
phy: qcom-qmp-usb: define QPHY_V2_PCS_PLL_LOCK_CHK_DLY_TIME register
2022-07-07 10:36:01 +05:30
phy-qcom-qmp-usb.c
phy: qcom-qmp-usb: define QPHY_V2_PCS_PLL_LOCK_CHK_DLY_TIME register
2022-07-07 10:36:01 +05:30
phy-qcom-qmp.h
phy: qcom-qmp: split PCS_UFS V3 symbols to separate header
2022-07-07 10:36:00 +05:30
phy-qcom-qusb2.c
phy: qcom-qusb2: Add compatible for MSM8953
2022-01-27 10:59:26 +05:30
phy-qcom-snps-femto-v2.c
phy: qcom-snps: Add sc8280xp support
2022-03-02 20:06:54 +05:30
phy-qcom-usb-hs-28nm.c
phy: qualcomm: usb28nm: Add MDM9607 init sequence
2021-02-04 13:35:39 +05:30
phy-qcom-usb-hs.c
phy: qualcomm: phy-qcom-usb-hs: repair non-kernel-doc comment
2021-08-06 17:15:29 +05:30
phy-qcom-usb-hsic.c
phy: qualcomm: usb-hsic: Fix the kernel-doc warn
2021-11-20 11:33:23 +05:30
phy-qcom-usb-ss.c
phy: qualcomm: usb: Add SuperSpeed PHY driver
2020-03-20 19:34:29 +05:30