58c3e3ac7a
Instead of querying hardcoded FPGA frequency register and then updating clock-frequency property in specificly named DT nodes in machine setup code register a clock provider that returns fixed-rate clock, configured by register specified in DT. This way we have less magic/hardcoded names and use more existing common clock framework code. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Tested-by: Guenter Roeck <linux@roeck-us.net>