H. Peter Anvin (Intel) 660569472d x86/cpufeature: Add the CPU feature bit for LKGS ... Add the CPU feature bit for LKGS (Load "Kernel" GS). LKGS instruction is introduced with Intel FRED (flexible return and event delivery) specification. Search for the latest FRED spec in most search engines with this search pattern: site:intel.com FRED (flexible return and event delivery) specification LKGS behaves like the MOV to GS instruction except that it loads the base address into the IA32_KERNEL_GS_BASE MSR instead of the GS segment’s descriptor cache, which is exactly what Linux kernel does to load a user level GS base. Thus, with LKGS, there is no need to SWAPGS away from the kernel GS base. [ mingo: Minor tweaks to the description. ] Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com> Signed-off-by: Xin Li <xin3.li@intel.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Link: https://lore.kernel.org/r/20230112072032.35626-2-xin3.li@intel.com		2023-01-12 13:06:20 +01:00
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asm	x86/cpufeature: Add the CPU feature bit for LKGS	2023-01-12 13:06:20 +01:00
uapi/asm	KVM: Delete all references to removed KVM_SET_MEMORY_ALIAS ioctl	2022-12-02 12:54:40 -05:00