Xing Zheng 5c1c63f634 clk: rockchip: add 533.25MHz to rk3399 clock rates table ...

We need to get the accurate 533.25MHz for the DP display.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

2016-10-21 09:34:19 +02:00

..

clk-cpu.c

clk: rockchip: fix cpuclk registration error handling

2016-05-30 09:40:23 +02:00

clk-ddr.c

clk: rockchip: add new clock-type for the ddrclk

2016-09-01 11:23:56 +02:00

clk-inverter.c

clk: rockchip: don't return NULL when registering inverter fails

2016-02-15 23:35:20 +01:00

clk-mmc-phase.c

clk: rockchip: Revert "clk: rockchip: reset init state before mmc card initialization"

2016-05-30 09:40:23 +02:00

clk-pll.c

clk: rockchip: use general clock flag when registering pll

2016-08-08 10:57:21 +02:00

clk-rk3036.c

clk: rockchip: release io resource when failing to init clk

2016-03-27 13:03:35 +02:00

clk-rk3188.c

clk: rockchip: release io resource when failing to init clk

2016-03-27 13:03:35 +02:00

clk-rk3228.c

clk: rockchip: export rk3228 MAC clocks

2016-07-01 01:50:11 +02:00

clk-rk3288.c

clk: rockchip: release io resource when failing to init clk

2016-03-27 13:03:35 +02:00

clk-rk3368.c

clk: rockchip: release io resource when failing to init clk

2016-03-27 13:03:35 +02:00

clk-rk3399.c

clk: rockchip: add 533.25MHz to rk3399 clock rates table

2016-10-21 09:34:19 +02:00

clk-rockchip.c

clk: rockchip: handle of_iomap failures in legacy clock driver

2016-08-23 18:00:25 +02:00

clk.c

clk: rockchip: add new clock-type for the ddrclk

2016-09-01 11:23:56 +02:00

clk.h

clk: rockchip: add new clock-type for the ddrclk

2016-09-01 11:23:56 +02:00

Makefile

clk: rockchip: add new clock-type for the ddrclk

2016-09-01 11:23:56 +02:00

softrst.c

clk: rockchip: Make reset_control_ops const

2016-03-29 16:29:46 -07:00