d875d6ccd3
Some platforms unfortunately have their SPI mode selection bits strapped incorrectly (such as being configured for passthrough mode when master mode is in fact the only useful configuration for it) and thus require correction in software. Add the SPI mode bits to the GPIO passthrough bits as the exceptions to the read-only rule for the hardware strap register so that the pinctrl subsystem can be used for such corrections. Signed-off-by: Zev Weiss <zev@bewilderbeest.net> Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au> Link: https://lore.kernel.org/r/20231005030849.11352-2-zev@bewilderbeest.net Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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| .. | ||
| Kconfig | ||
| Makefile | ||
| pinctrl-aspeed-g4.c | ||
| pinctrl-aspeed-g5.c | ||
| pinctrl-aspeed-g6.c | ||
| pinctrl-aspeed.c | ||
| pinctrl-aspeed.h | ||
| pinmux-aspeed.c | ||
| pinmux-aspeed.h | ||