cd928fced9
Mostly the same as i915. We add a new hint for userspace to force an
object into the mappable part of vram.
We also need to tell userspace how large the mappable part is. In Vulkan
for example, there will be two vram heaps for small-bar systems. And
here the size of each heap needs to be known. Likewise the used/avail
tracking needs to account for the mappable part.
We also limit the available tracking going forward, such that we limit
to privileged users only, since these values are system wide and are
technically considered an info leak.
v2 (Maarten):
- s/NEEDS_CPU_ACCESS/NEEDS_VISIBLE_VRAM/ in the uapi. We also no
longer require smem as an extra placement. This is more flexible,
and lets us use this for clear-color surfaces, since we need CPU access
there but we don't want to attach smem, since that effectively disables
CCS from kernel pov.
- Reject clear-color CCS buffers where NEEDS_VISIBLE_VRAM is not set,
instead of migrating it behind the scenes.
v3 (José):
- Split the changes that limit the accounting for perfmon_capable()
into a separate patch.
- Use XE_BO_CREATE_VRAM_MASK.
v4 (Gwan-gyeong Mun):
- Add some kernel-doc for the query bits.
v5:
- One small kernel-doc correction. The cpu_visible_size and
corresponding used tracking are always zero for non
XE_MEM_REGION_CLASS_VRAM.
v6:
- Without perfmon_capable() it likely makes more sense to report as
zero, instead of reporting as used == total size. This should give
similar behaviour as i915 which rather tracks free instead of used.
- Only enforce NEEDS_VISIBLE_VRAM on rc_ccs_cc_plane surfaces when the
device is actually small-bar.
Testcase: igt/tests/xe_query
Testcase: igt/tests/xe_mmap@small-bar
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Filip Hazubski <filip.hazubski@intel.com>
Cc: Carl Zhang <carl.zhang@intel.com>
Cc: Effie Yu <effie.yu@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
45 lines
1.3 KiB
C
45 lines
1.3 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2022 Intel Corporation
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*/
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#ifndef _XE_TTM_VRAM_MGR_H_
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#define _XE_TTM_VRAM_MGR_H_
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#include "xe_ttm_vram_mgr_types.h"
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enum dma_data_direction;
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struct xe_device;
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struct xe_tile;
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int __xe_ttm_vram_mgr_init(struct xe_device *xe, struct xe_ttm_vram_mgr *mgr,
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u32 mem_type, u64 size, u64 io_size,
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u64 default_page_size);
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int xe_ttm_vram_mgr_init(struct xe_tile *tile, struct xe_ttm_vram_mgr *mgr);
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int xe_ttm_vram_mgr_alloc_sgt(struct xe_device *xe,
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struct ttm_resource *res,
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u64 offset, u64 length,
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struct device *dev,
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enum dma_data_direction dir,
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struct sg_table **sgt);
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void xe_ttm_vram_mgr_free_sgt(struct device *dev, enum dma_data_direction dir,
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struct sg_table *sgt);
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u64 xe_ttm_vram_get_cpu_visible_size(struct ttm_resource_manager *man);
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void xe_ttm_vram_get_used(struct ttm_resource_manager *man,
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u64 *used, u64 *used_visible);
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static inline struct xe_ttm_vram_mgr_resource *
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to_xe_ttm_vram_mgr_resource(struct ttm_resource *res)
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{
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return container_of(res, struct xe_ttm_vram_mgr_resource, base);
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}
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static inline struct xe_ttm_vram_mgr *
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to_xe_ttm_vram_mgr(struct ttm_resource_manager *man)
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{
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return container_of(man, struct xe_ttm_vram_mgr, manager);
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}
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#endif
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