e42edf9b9d
Transactional Memory was removed from the architecture in ISA v3.1. For threads running in P8/P9 compatibility mode on P10 a synthetic TM implementation is provided. In this implementation, tbegin. always sets cr0 eq meaning the abort handler is always called. This is not an issue as users of TM are expected to have a fallback non transactional way to make forward progress in the abort handler. The TEXASR indicates if a transaction failure is due to a synthetic implementation. Some of the TM self tests need a non-degenerate TM implementation for their testing to be meaningful so check for a synthetic implementation and skip the test if so. Signed-off-by: Jordan Niethe <jniethe5@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20210729041317.366612-2-jniethe5@gmail.com
183 lines
5.4 KiB
C
183 lines
5.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright 2019, Gustavo Romero, Michael Neuling, IBM Corp.
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*
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* This test will spawn two processes. Both will be attached to the same
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* CPU (CPU 0). The child will be in a loop writing to FP register f31 and
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* VMX/VEC/Altivec register vr31 a known value, called poison, calling
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* sched_yield syscall after to allow the parent to switch on the CPU.
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* Parent will set f31 and vr31 to 1 and in a loop will check if f31 and
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* vr31 remain 1 as expected until a given timeout (2m). If the issue is
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* present child's poison will leak into parent's f31 or vr31 registers,
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* otherwise, poison will never leak into parent's f31 and vr31 registers.
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*/
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#define _GNU_SOURCE
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#include <stdio.h>
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#include <stdlib.h>
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#include <unistd.h>
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#include <inttypes.h>
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#include <sched.h>
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#include <sys/types.h>
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#include <signal.h>
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#include "tm.h"
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int tm_poison_test(void)
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{
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int cpu, pid;
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cpu_set_t cpuset;
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uint64_t poison = 0xdeadbeefc0dec0fe;
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uint64_t unknown = 0;
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bool fail_fp = false;
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bool fail_vr = false;
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SKIP_IF(!have_htm());
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SKIP_IF(htm_is_synthetic());
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cpu = pick_online_cpu();
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FAIL_IF(cpu < 0);
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// Attach both Child and Parent to the same CPU
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CPU_ZERO(&cpuset);
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CPU_SET(cpu, &cpuset);
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FAIL_IF(sched_setaffinity(0, sizeof(cpuset), &cpuset) != 0);
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pid = fork();
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if (!pid) {
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/**
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* child
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*/
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while (1) {
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sched_yield();
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asm (
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"mtvsrd 31, %[poison];" // f31 = poison
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"mtvsrd 63, %[poison];" // vr31 = poison
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: : [poison] "r" (poison) : );
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}
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}
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/**
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* parent
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*/
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asm (
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/*
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* Set r3, r4, and f31 to known value 1 before entering
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* in transaction. They won't be written after that.
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*/
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" li 3, 0x1 ;"
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" li 4, 0x1 ;"
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" mtvsrd 31, 4 ;"
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/*
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* The Time Base (TB) is a 64-bit counter register that is
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* independent of the CPU clock and which is incremented
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* at a frequency of 512000000 Hz, so every 1.953125ns.
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* So it's necessary 120s/0.000000001953125s = 61440000000
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* increments to get a 2 minutes timeout. Below we set that
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* value in r5 and then use r6 to track initial TB value,
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* updating TB values in r7 at every iteration and comparing it
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* to r6. When r7 (current) - r6 (initial) > 61440000000 we bail
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* out since for sure we spent already 2 minutes in the loop.
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* SPR 268 is the TB register.
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*/
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" lis 5, 14 ;"
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" ori 5, 5, 19996 ;"
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" sldi 5, 5, 16 ;" // r5 = 61440000000
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" mfspr 6, 268 ;" // r6 (TB initial)
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"1: mfspr 7, 268 ;" // r7 (TB current)
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" subf 7, 6, 7 ;" // r7 - r6 > 61440000000 ?
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" cmpd 7, 5 ;"
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" bgt 3f ;" // yes, exit
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/*
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* Main loop to check f31
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*/
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" tbegin. ;" // no, try again
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" beq 1b ;" // restart if no timeout
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" mfvsrd 3, 31 ;" // read f31
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" cmpd 3, 4 ;" // f31 == 1 ?
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" bne 2f ;" // broken :-(
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" tabort. 3 ;" // try another transaction
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"2: tend. ;" // commit transaction
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"3: mr %[unknown], 3 ;" // record r3
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: [unknown] "=r" (unknown)
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:
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: "cr0", "r3", "r4", "r5", "r6", "r7", "vs31"
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);
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/*
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* On leak 'unknown' will contain 'poison' value from child,
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* otherwise (no leak) 'unknown' will contain the same value
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* as r3 before entering in transactional mode, i.e. 0x1.
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*/
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fail_fp = unknown != 0x1;
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if (fail_fp)
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printf("Unknown value %#"PRIx64" leaked into f31!\n", unknown);
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else
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printf("Good, no poison or leaked value into FP registers\n");
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asm (
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/*
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* Set r3, r4, and vr31 to known value 1 before entering
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* in transaction. They won't be written after that.
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*/
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" li 3, 0x1 ;"
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" li 4, 0x1 ;"
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" mtvsrd 63, 4 ;"
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" lis 5, 14 ;"
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" ori 5, 5, 19996 ;"
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" sldi 5, 5, 16 ;" // r5 = 61440000000
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" mfspr 6, 268 ;" // r6 (TB initial)
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"1: mfspr 7, 268 ;" // r7 (TB current)
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" subf 7, 6, 7 ;" // r7 - r6 > 61440000000 ?
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" cmpd 7, 5 ;"
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" bgt 3f ;" // yes, exit
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/*
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* Main loop to check vr31
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*/
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" tbegin. ;" // no, try again
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" beq 1b ;" // restart if no timeout
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" mfvsrd 3, 63 ;" // read vr31
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" cmpd 3, 4 ;" // vr31 == 1 ?
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" bne 2f ;" // broken :-(
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" tabort. 3 ;" // try another transaction
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"2: tend. ;" // commit transaction
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"3: mr %[unknown], 3 ;" // record r3
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: [unknown] "=r" (unknown)
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:
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: "cr0", "r3", "r4", "r5", "r6", "r7", "vs63"
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);
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/*
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* On leak 'unknown' will contain 'poison' value from child,
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* otherwise (no leak) 'unknown' will contain the same value
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* as r3 before entering in transactional mode, i.e. 0x1.
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*/
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fail_vr = unknown != 0x1;
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if (fail_vr)
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printf("Unknown value %#"PRIx64" leaked into vr31!\n", unknown);
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else
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printf("Good, no poison or leaked value into VEC registers\n");
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kill(pid, SIGKILL);
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return (fail_fp | fail_vr);
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}
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int main(int argc, char *argv[])
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{
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/* Test completes in about 4m */
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test_harness_set_timeout(250);
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return test_harness(tm_poison_test, "tm_poison_test");
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}
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