7f016b35ca
On newer AMD platforms with SFH, it is observed that random interrupts get generated on the SFH hardware and until this is cleared the firmware sensor processing is stalled, resulting in no data been received to driver side. Add routines to handle these interrupts, so that firmware operations are not stalled. Signed-off-by: Basavaraj Natikar <Basavaraj.Natikar@amd.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
148 lines
3.2 KiB
C
148 lines
3.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* AMD MP2 PCIe communication driver
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* Copyright 2020-2021 Advanced Micro Devices, Inc.
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* Authors: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
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* Sandeep Singh <Sandeep.singh@amd.com>
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* Basavaraj Natikar <Basavaraj.Natikar@amd.com>
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*/
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#ifndef PCIE_MP2_AMD_H
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#define PCIE_MP2_AMD_H
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#include <linux/pci.h>
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#include "amd_sfh_hid.h"
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#define PCI_DEVICE_ID_AMD_MP2 0x15E4
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#define ENABLE_SENSOR 1
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#define DISABLE_SENSOR 2
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#define STOP_ALL_SENSORS 8
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/* MP2 C2P Message Registers */
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#define AMD_C2P_MSG0 0x10500
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#define AMD_C2P_MSG1 0x10504
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#define AMD_C2P_MSG2 0x10508
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#define AMD_C2P_MSG(regno) (0x10500 + ((regno) * 4))
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#define AMD_P2C_MSG(regno) (0x10680 + ((regno) * 4))
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/* MP2 P2C Message Registers */
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#define AMD_P2C_MSG3 0x1068C /* Supported Sensors info */
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#define V2_STATUS 0x2
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#define SENSOR_ENABLED 4
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#define SENSOR_DISABLED 5
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#define HPD_IDX 16
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#define AMD_SFH_IDLE_LOOP 200
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/* SFH Command register */
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union sfh_cmd_base {
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u32 ul;
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struct {
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u32 cmd_id : 8;
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u32 sensor_id : 8;
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u32 period : 16;
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} s;
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struct {
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u32 cmd_id : 4;
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u32 intr_disable : 1;
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u32 rsvd1 : 3;
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u32 length : 7;
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u32 mem_type : 1;
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u32 sensor_id : 8;
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u32 period : 8;
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} cmd_v2;
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};
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union cmd_response {
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u32 resp;
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struct {
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u32 status : 2;
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u32 out_in_c2p : 1;
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u32 rsvd1 : 1;
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u32 response : 4;
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u32 sub_cmd : 8;
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u32 sensor_id : 6;
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u32 rsvd2 : 10;
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} response_v2;
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};
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union sfh_cmd_param {
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u32 ul;
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struct {
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u32 buf_layout : 2;
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u32 buf_length : 6;
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u32 rsvd : 24;
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} s;
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};
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struct sfh_cmd_reg {
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union sfh_cmd_base cmd_base;
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union sfh_cmd_param cmd_param;
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phys_addr_t phys_addr;
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};
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enum sensor_idx {
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accel_idx = 0,
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gyro_idx = 1,
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mag_idx = 2,
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als_idx = 19
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};
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struct amd_mp2_dev {
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struct pci_dev *pdev;
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struct amdtp_cl_data *cl_data;
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void __iomem *mmio;
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const struct amd_mp2_ops *mp2_ops;
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struct amd_input_data in_data;
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/* mp2 active control status */
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u32 mp2_acs;
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};
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struct amd_mp2_sensor_info {
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u8 sensor_idx;
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u32 period;
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dma_addr_t dma_address;
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};
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enum mem_use_type {
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USE_DRAM,
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USE_C2P_REG,
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};
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struct hpd_status {
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union {
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struct {
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u32 human_presence_report : 4;
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u32 human_presence_actual : 4;
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u32 probablity : 8;
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u32 object_distance : 16;
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} shpd;
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u32 val;
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};
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};
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void amd_start_sensor(struct amd_mp2_dev *privdata, struct amd_mp2_sensor_info info);
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void amd_stop_sensor(struct amd_mp2_dev *privdata, u16 sensor_idx);
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void amd_stop_all_sensors(struct amd_mp2_dev *privdata);
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int amd_mp2_get_sensor_num(struct amd_mp2_dev *privdata, u8 *sensor_id);
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int amd_sfh_hid_client_init(struct amd_mp2_dev *privdata);
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int amd_sfh_hid_client_deinit(struct amd_mp2_dev *privdata);
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u32 amd_sfh_wait_for_response(struct amd_mp2_dev *mp2, u8 sid, u32 sensor_sts);
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void amd_mp2_suspend(struct amd_mp2_dev *mp2);
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void amd_mp2_resume(struct amd_mp2_dev *mp2);
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struct amd_mp2_ops {
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void (*start)(struct amd_mp2_dev *privdata, struct amd_mp2_sensor_info info);
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void (*stop)(struct amd_mp2_dev *privdata, u16 sensor_idx);
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void (*stop_all)(struct amd_mp2_dev *privdata);
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int (*response)(struct amd_mp2_dev *mp2, u8 sid, u32 sensor_sts);
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void (*clear_intr)(struct amd_mp2_dev *privdata);
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int (*init_intr)(struct amd_mp2_dev *privdata);
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};
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#endif
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