6351f1708b
Turns out the undocumented and reserved bits of port status/control
register of the root port need to be set to use the HCI in HSIC mode.
Typically the firmware does this, but that is not always good enough,
because the bits get lost if the HSIC clock is disabled (e.g. when
ehci-mv is build as a module).
This supplements commit 7b104f890a
("USB: EHCI: ehci-mv: add HSIC
support").
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Link: https://lore.kernel.org/r/20200309130014.548168-1-lkundrak@v3.sk
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
324 lines
7.4 KiB
C
324 lines
7.4 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2011 Marvell International Ltd. All rights reserved.
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* Author: Chao Xie <chao.xie@marvell.com>
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* Neil Zhang <zhangwm@marvell.com>
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/usb/otg.h>
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#include <linux/usb/of.h>
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#include <linux/platform_data/mv_usb.h>
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#include <linux/io.h>
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#include <linux/usb/hcd.h>
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#include "ehci.h"
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/* registers */
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#define U2x_CAPREGS_OFFSET 0x100
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#define CAPLENGTH_MASK (0xff)
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#define hcd_to_ehci_hcd_mv(h) ((struct ehci_hcd_mv *)hcd_to_ehci(h)->priv)
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struct ehci_hcd_mv {
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/* Which mode does this ehci running OTG/Host ? */
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int mode;
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void __iomem *base;
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void __iomem *cap_regs;
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void __iomem *op_regs;
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struct usb_phy *otg;
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struct clk *clk;
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struct phy *phy;
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int (*set_vbus)(unsigned int vbus);
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};
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static void ehci_clock_enable(struct ehci_hcd_mv *ehci_mv)
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{
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clk_prepare_enable(ehci_mv->clk);
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}
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static void ehci_clock_disable(struct ehci_hcd_mv *ehci_mv)
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{
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clk_disable_unprepare(ehci_mv->clk);
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}
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static int mv_ehci_enable(struct ehci_hcd_mv *ehci_mv)
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{
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ehci_clock_enable(ehci_mv);
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return phy_init(ehci_mv->phy);
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}
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static void mv_ehci_disable(struct ehci_hcd_mv *ehci_mv)
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{
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phy_exit(ehci_mv->phy);
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ehci_clock_disable(ehci_mv);
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}
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static int mv_ehci_reset(struct usb_hcd *hcd)
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{
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struct device *dev = hcd->self.controller;
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struct ehci_hcd_mv *ehci_mv = hcd_to_ehci_hcd_mv(hcd);
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struct ehci_hcd *ehci = hcd_to_ehci(hcd);
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u32 status;
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int retval;
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if (ehci_mv == NULL) {
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dev_err(dev, "Can not find private ehci data\n");
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return -ENODEV;
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}
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hcd->has_tt = 1;
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retval = ehci_setup(hcd);
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if (retval)
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dev_err(dev, "ehci_setup failed %d\n", retval);
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if (of_usb_get_phy_mode(dev->of_node) == USBPHY_INTERFACE_MODE_HSIC) {
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status = ehci_readl(ehci, &ehci->regs->port_status[0]);
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status |= PORT_TEST_FORCE;
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ehci_writel(ehci, status, &ehci->regs->port_status[0]);
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status &= ~PORT_TEST_FORCE;
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ehci_writel(ehci, status, &ehci->regs->port_status[0]);
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}
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return retval;
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}
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static struct hc_driver __read_mostly ehci_platform_hc_driver;
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static const struct ehci_driver_overrides platform_overrides __initconst = {
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.reset = mv_ehci_reset,
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.extra_priv_size = sizeof(struct ehci_hcd_mv),
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};
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static int mv_ehci_probe(struct platform_device *pdev)
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{
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struct mv_usb_platform_data *pdata = dev_get_platdata(&pdev->dev);
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struct usb_hcd *hcd;
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struct ehci_hcd *ehci;
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struct ehci_hcd_mv *ehci_mv;
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struct resource *r;
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int retval = -ENODEV;
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u32 offset;
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u32 status;
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if (usb_disabled())
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return -ENODEV;
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hcd = usb_create_hcd(&ehci_platform_hc_driver, &pdev->dev, "mv ehci");
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if (!hcd)
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return -ENOMEM;
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platform_set_drvdata(pdev, hcd);
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ehci_mv = hcd_to_ehci_hcd_mv(hcd);
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ehci_mv->mode = MV_USB_MODE_HOST;
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if (pdata) {
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ehci_mv->mode = pdata->mode;
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ehci_mv->set_vbus = pdata->set_vbus;
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}
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ehci_mv->phy = devm_phy_optional_get(&pdev->dev, "usb");
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if (IS_ERR(ehci_mv->phy)) {
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retval = PTR_ERR(ehci_mv->phy);
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if (retval != -EPROBE_DEFER)
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dev_err(&pdev->dev, "Failed to get phy.\n");
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goto err_put_hcd;
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}
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ehci_mv->clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(ehci_mv->clk)) {
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dev_err(&pdev->dev, "error getting clock\n");
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retval = PTR_ERR(ehci_mv->clk);
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goto err_put_hcd;
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}
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r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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ehci_mv->base = devm_ioremap_resource(&pdev->dev, r);
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if (IS_ERR(ehci_mv->base)) {
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retval = PTR_ERR(ehci_mv->base);
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goto err_put_hcd;
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}
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retval = mv_ehci_enable(ehci_mv);
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if (retval) {
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dev_err(&pdev->dev, "init phy error %d\n", retval);
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goto err_put_hcd;
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}
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ehci_mv->cap_regs =
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(void __iomem *) ((unsigned long) ehci_mv->base + U2x_CAPREGS_OFFSET);
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offset = readl(ehci_mv->cap_regs) & CAPLENGTH_MASK;
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ehci_mv->op_regs =
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(void __iomem *) ((unsigned long) ehci_mv->cap_regs + offset);
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hcd->rsrc_start = r->start;
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hcd->rsrc_len = resource_size(r);
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hcd->regs = ehci_mv->op_regs;
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hcd->irq = platform_get_irq(pdev, 0);
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if (!hcd->irq) {
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dev_err(&pdev->dev, "Cannot get irq.");
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retval = -ENODEV;
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goto err_disable_clk;
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}
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ehci = hcd_to_ehci(hcd);
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ehci->caps = (struct ehci_caps __iomem *) ehci_mv->cap_regs;
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if (ehci_mv->mode == MV_USB_MODE_OTG) {
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ehci_mv->otg = devm_usb_get_phy(&pdev->dev, USB_PHY_TYPE_USB2);
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if (IS_ERR(ehci_mv->otg)) {
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retval = PTR_ERR(ehci_mv->otg);
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if (retval == -ENXIO)
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dev_info(&pdev->dev, "MV_USB_MODE_OTG "
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"must have CONFIG_USB_PHY enabled\n");
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else
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dev_err(&pdev->dev,
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"unable to find transceiver\n");
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goto err_disable_clk;
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}
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retval = otg_set_host(ehci_mv->otg->otg, &hcd->self);
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if (retval < 0) {
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dev_err(&pdev->dev,
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"unable to register with transceiver\n");
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retval = -ENODEV;
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goto err_disable_clk;
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}
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/* otg will enable clock before use as host */
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mv_ehci_disable(ehci_mv);
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} else {
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if (ehci_mv->set_vbus)
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ehci_mv->set_vbus(1);
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retval = usb_add_hcd(hcd, hcd->irq, IRQF_SHARED);
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if (retval) {
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dev_err(&pdev->dev,
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"failed to add hcd with err %d\n", retval);
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goto err_set_vbus;
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}
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device_wakeup_enable(hcd->self.controller);
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}
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if (of_usb_get_phy_mode(pdev->dev.of_node) == USBPHY_INTERFACE_MODE_HSIC) {
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status = ehci_readl(ehci, &ehci->regs->port_status[0]);
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/* These "reserved" bits actually enable HSIC mode. */
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status |= BIT(25);
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status &= ~GENMASK(31, 30);
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ehci_writel(ehci, status, &ehci->regs->port_status[0]);
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}
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dev_info(&pdev->dev,
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"successful find EHCI device with regs 0x%p irq %d"
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" working in %s mode\n", hcd->regs, hcd->irq,
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ehci_mv->mode == MV_USB_MODE_OTG ? "OTG" : "Host");
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return 0;
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err_set_vbus:
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if (ehci_mv->set_vbus)
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ehci_mv->set_vbus(0);
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err_disable_clk:
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mv_ehci_disable(ehci_mv);
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err_put_hcd:
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usb_put_hcd(hcd);
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return retval;
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}
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static int mv_ehci_remove(struct platform_device *pdev)
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{
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struct usb_hcd *hcd = platform_get_drvdata(pdev);
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struct ehci_hcd_mv *ehci_mv = hcd_to_ehci_hcd_mv(hcd);
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if (hcd->rh_registered)
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usb_remove_hcd(hcd);
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if (!IS_ERR_OR_NULL(ehci_mv->otg))
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otg_set_host(ehci_mv->otg->otg, NULL);
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if (ehci_mv->mode == MV_USB_MODE_HOST) {
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if (ehci_mv->set_vbus)
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ehci_mv->set_vbus(0);
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mv_ehci_disable(ehci_mv);
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}
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usb_put_hcd(hcd);
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return 0;
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}
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MODULE_ALIAS("mv-ehci");
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static const struct platform_device_id ehci_id_table[] = {
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{"pxa-u2oehci", 0},
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{"pxa-sph", 0},
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{},
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};
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static void mv_ehci_shutdown(struct platform_device *pdev)
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{
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struct usb_hcd *hcd = platform_get_drvdata(pdev);
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if (!hcd->rh_registered)
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return;
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if (hcd->driver->shutdown)
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hcd->driver->shutdown(hcd);
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}
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static const struct of_device_id ehci_mv_dt_ids[] = {
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{ .compatible = "marvell,pxau2o-ehci", },
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{},
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};
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static struct platform_driver ehci_mv_driver = {
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.probe = mv_ehci_probe,
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.remove = mv_ehci_remove,
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.shutdown = mv_ehci_shutdown,
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.driver = {
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.name = "mv-ehci",
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.bus = &platform_bus_type,
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.of_match_table = ehci_mv_dt_ids,
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},
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.id_table = ehci_id_table,
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};
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static int __init ehci_platform_init(void)
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{
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if (usb_disabled())
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return -ENODEV;
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ehci_init_driver(&ehci_platform_hc_driver, &platform_overrides);
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return platform_driver_register(&ehci_mv_driver);
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}
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module_init(ehci_platform_init);
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static void __exit ehci_platform_cleanup(void)
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{
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platform_driver_unregister(&ehci_mv_driver);
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}
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module_exit(ehci_platform_cleanup);
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MODULE_DESCRIPTION("Marvell EHCI driver");
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MODULE_AUTHOR("Chao Xie <chao.xie@marvell.com>");
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MODULE_AUTHOR("Neil Zhang <zhangwm@marvell.com>");
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MODULE_ALIAS("mv-ehci");
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MODULE_LICENSE("GPL");
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MODULE_DEVICE_TABLE(of, ehci_mv_dt_ids);
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