Adam Thomson 63a450aa4d ASoC: da7219: Update PLL ranges and dividers to improve locking
The expected MCLK frequency ranges and the associated dividers
are updated to improve PLL locking in a corner scenario, with low
MCLK frequency near an input divider change boundary.

Signed-off-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2016-04-19 17:39:52 +01:00
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