linux/drivers/cxl
Ben Widawsky 6423035fd2 cxl/hdm: Fix decoder count calculation
The decoder count in the HDM decoder capability structure is an encoded
field. As defined in the spec:

Decoder Count: Reports the number of memory address decoders implemented
by the component.
0 – 1 Decoder
1 – 2 Decoders
2 – 4 Decoders
3 – 6 Decoders
4 – 8 Decoders
5 – 10 Decoders
All other values are reserved

Nothing is actually fixed by this as nothing actually used this mapping
yet.

Cc: Ira Weiny <ira.weiny@intel.com>
Fixes: 08422378c4 ("cxl/pci: Add HDM decoder capabilities")
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Ben Widawsky <ben.widawsky@intel.com>
Link: https://lore.kernel.org/r/20210611190111.121295-1-ben.widawsky@intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2021-06-12 10:29:03 -07:00
..
acpi.c cxl/acpi: Introduce cxl_decoder objects 2021-06-09 18:02:39 -07:00
core.c cxl/hdm: Fix decoder count calculation 2021-06-12 10:29:03 -07:00
cxl.h cxl/hdm: Fix decoder count calculation 2021-06-12 10:29:03 -07:00
Kconfig cxl/Kconfig: Default drivers to CONFIG_CXL_BUS 2021-06-09 18:02:38 -07:00
Makefile cxl/acpi: Introduce the root of a cxl_port topology 2021-06-09 18:02:38 -07:00
mem.h cxl/mem: Get rid of @cxlm.base 2021-05-26 11:20:18 -07:00
pci.c cxl/pci: Add HDM decoder capabilities 2021-06-05 17:39:12 -07:00
pci.h