652caf4ab1
- Fix i.MX6SX PCIe MSI interrupt number, so that MSI IRQs can be
properly propagated to the upstream interrupt controller.
- Fix GPCv2 MIPI/PCIe/USB_HSIC's PGC offset. The values in Reference
Manual are incorrect.
- Correct SDMA setting for i.MX6Q SPI5 device to fix the issue, that
the SPI controller RX FIFO was not empty after a DMA transfer, and
the driver gets stuck in the next PIO transfer when reading one word
more than expected.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJbKLcnAAoJEFBXWFqHsHzO8dMH/ijDSZf172X9jls8iQgcFQ8h
ZAnIj+T23j9L8CTHBx5OLgUxaHYgX410HYvqWuubCNDKv+DMCP+7QNE6v+iSehhT
8sA4dX5296orNb9d5dXyf0XIZ4dA1ljhoZUY6r9DHGFfkIriHwX6HB0zl9EmroAK
mVMGeltfGqPCZ6bH1O6L4oCZNfaOmqBz1f767Es4uxD0IzPg/9BlarqLgASu+op1
1KVFGKY/o4S6QrMxrLxlsrqFUx1DmRQyWxtKYyPlkY6LIHeiJNMCLh9NzW+/qGHf
keycpIjVdlVdZMILDeTju3gszoOmXjq0L1XP9Ityf9OLq53c1Ypsn9npK2ccZNU=
=lalT
-----END PGP SIGNATURE-----
Merge tag 'imx-fixes-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
i.MX fixes for 4.18:
- Fix i.MX6SX PCIe MSI interrupt number, so that MSI IRQs can be
properly propagated to the upstream interrupt controller.
- Fix GPCv2 MIPI/PCIe/USB_HSIC's PGC offset. The values in Reference
Manual are incorrect.
- Correct SDMA setting for i.MX6Q SPI5 device to fix the issue, that
the SPI controller RX FIFO was not empty after a DMA transfer, and
the driver gets stuck in the next PIO transfer when reading one word
more than expected.
* tag 'imx-fixes-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx6sx: fix irq for pcie bridge
soc: imx: gpcv2: correct PGC offset
ARM: dts: imx6q: Use correct SDMA script for SPI5 core
Signed-off-by: Olof Johansson <olof@lixom.net>
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| dts | ||
| .gitignore | ||
| deflate_xip_data.sh | ||
| install.sh | ||
| Makefile | ||