Hangyu Hua bea0b66efa clk: ux500: fix a possible off-by-one in u8500_prcc_reset_base() ...

Off-by-one will happen when index == ARRAY_SIZE(ur->base).

Fixes: b14cbdfd467d ("clk: ux500: Add driver for the reset portions of PRCC")
Signed-off-by: Hangyu Hua <hbh25y@gmail.com>
Link: https://lore.kernel.org/r/20220518062537.17933-1-hbh25y@gmail.com
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

2022-05-18 13:34:03 -07:00

..

abx500-clk.c

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 194

2019-05-30 11:29:22 -07:00

clk-prcc.c

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 194

2019-05-30 11:29:22 -07:00

clk-prcmu.c

clk: ux500: Implement the missing CLKOUT clocks

2022-04-25 16:17:25 -07:00

clk-sysctrl.c

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 194

2019-05-30 11:29:22 -07:00

clk.h

clk: ux500: Implement the missing CLKOUT clocks

2022-04-25 16:17:25 -07:00

Makefile

clk: ux500: Add driver for the reset portions of PRCC

2021-10-26 18:06:05 -07:00

prcc.h

clk: ux500: Add driver for the reset portions of PRCC

2021-10-26 18:06:05 -07:00

reset-prcc.c

clk: ux500: fix a possible off-by-one in u8500_prcc_reset_base()

2022-05-18 13:34:03 -07:00

reset-prcc.h

clk: ux500: Add driver for the reset portions of PRCC

2021-10-26 18:06:05 -07:00

u8500_of_clk.c

clk: ux500: Implement the missing CLKOUT clocks

2022-04-25 16:17:25 -07:00