d36d697a00
mtk_clk_simple_probe was added by Chun-Jie to simply common flow of MediaTek clock drivers and ChenYu enhanced the error path of mtk_clk_simple_probe and added mtk_clk_simple_remove. Let's use mtk_clk_simple_probe and mtk_clk_simple_probe in other MediaTek clock drivers as well. Signed-off-by: Miles Chen <miles.chen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220922091841.4099-7-miles.chen@mediatek.com Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
65 lines
1.5 KiB
C
65 lines
1.5 KiB
C
// SPDX-License-Identifier: GPL-2.0
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//
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// Copyright (c) 2018 MediaTek Inc.
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// Author: Weiyi Lu <weiyi.lu@mediatek.com>
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#include <linux/clk-provider.h>
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#include <linux/platform_device.h>
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#include "clk-mtk.h"
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#include "clk-gate.h"
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#include <dt-bindings/clock/mt8183-clk.h>
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static const struct mtk_gate_regs vdec0_cg_regs = {
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.set_ofs = 0x0,
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.clr_ofs = 0x4,
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.sta_ofs = 0x0,
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};
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static const struct mtk_gate_regs vdec1_cg_regs = {
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.set_ofs = 0x8,
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.clr_ofs = 0xc,
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.sta_ofs = 0x8,
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};
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#define GATE_VDEC0_I(_id, _name, _parent, _shift) \
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GATE_MTK(_id, _name, _parent, &vdec0_cg_regs, _shift, \
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&mtk_clk_gate_ops_setclr_inv)
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#define GATE_VDEC1_I(_id, _name, _parent, _shift) \
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GATE_MTK(_id, _name, _parent, &vdec1_cg_regs, _shift, \
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&mtk_clk_gate_ops_setclr_inv)
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static const struct mtk_gate vdec_clks[] = {
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/* VDEC0 */
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GATE_VDEC0_I(CLK_VDEC_VDEC, "vdec_vdec", "mm_sel", 0),
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/* VDEC1 */
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GATE_VDEC1_I(CLK_VDEC_LARB1, "vdec_larb1", "mm_sel", 0),
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};
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static const struct mtk_clk_desc vdec_desc = {
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.clks = vdec_clks,
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.num_clks = ARRAY_SIZE(vdec_clks),
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};
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static const struct of_device_id of_match_clk_mt8183_vdec[] = {
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{
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.compatible = "mediatek,mt8183-vdecsys",
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.data = &vdec_desc,
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}, {
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/* sentinel */
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}
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};
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static struct platform_driver clk_mt8183_vdec_drv = {
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.probe = mtk_clk_simple_probe,
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.remove = mtk_clk_simple_remove,
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.driver = {
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.name = "clk-mt8183-vdec",
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.of_match_table = of_match_clk_mt8183_vdec,
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},
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};
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builtin_platform_driver(clk_mt8183_vdec_drv);
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