134155a50c
These structs are identical, use a single struct to represent private data for the DRM plane. This is a preparation for configuring layer routing from the CRTC (mixer) instead of current approach of setting up routing from individual layer's atomic_update callback. Signed-off-by: Ondrej Jirman <megi@xff.cz> Reviewed-by: Maxime Ripard <mripard@kernel.org> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20240224150604.3855534-2-megi@xff.cz Signed-off-by: Maxime Ripard <mripard@kernel.org>
61 lines
2.1 KiB
C
61 lines
2.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright (C) Jernej Skrabec <jernej.skrabec@siol.net>
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*/
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#ifndef _SUN8I_VI_LAYER_H_
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#define _SUN8I_VI_LAYER_H_
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#include <drm/drm_plane.h>
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#define SUN8I_MIXER_CHAN_VI_LAYER_ATTR(base, layer) \
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((base) + 0x30 * (layer) + 0x0)
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#define SUN8I_MIXER_CHAN_VI_LAYER_SIZE(base, layer) \
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((base) + 0x30 * (layer) + 0x4)
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#define SUN8I_MIXER_CHAN_VI_LAYER_COORD(base, layer) \
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((base) + 0x30 * (layer) + 0x8)
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#define SUN8I_MIXER_CHAN_VI_LAYER_PITCH(base, layer, plane) \
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((base) + 0x30 * (layer) + 0xc + 4 * (plane))
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#define SUN8I_MIXER_CHAN_VI_LAYER_TOP_LADDR(base, layer, plane) \
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((base) + 0x30 * (layer) + 0x18 + 4 * (plane))
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#define SUN8I_MIXER_CHAN_VI_OVL_SIZE(base) \
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((base) + 0xe8)
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#define SUN8I_MIXER_CHAN_VI_HDS_Y(base) \
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((base) + 0xf0)
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#define SUN8I_MIXER_CHAN_VI_HDS_UV(base) \
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((base) + 0xf4)
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#define SUN8I_MIXER_CHAN_VI_VDS_Y(base) \
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((base) + 0xf8)
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#define SUN8I_MIXER_CHAN_VI_VDS_UV(base) \
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((base) + 0xfc)
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#define SUN8I_MIXER_FCC_GLOBAL_ALPHA_REG \
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(0xAA000 + 0x90)
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#define SUN8I_MIXER_FCC_GLOBAL_ALPHA(x) ((x) << 24)
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#define SUN8I_MIXER_FCC_GLOBAL_ALPHA_MASK GENMASK(31, 24)
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#define SUN8I_MIXER_CHAN_VI_LAYER_ATTR_EN BIT(0)
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/* RGB mode should be set for RGB formats and cleared for YCbCr */
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#define SUN8I_MIXER_CHAN_VI_LAYER_ATTR_RGB_MODE BIT(15)
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#define SUN8I_MIXER_CHAN_VI_LAYER_ATTR_FBFMT_OFFSET 8
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#define SUN8I_MIXER_CHAN_VI_LAYER_ATTR_FBFMT_MASK GENMASK(12, 8)
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#define SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA_MODE_MASK GENMASK(2, 1)
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#define SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA_MASK GENMASK(31, 24)
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#define SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA(x) ((x) << 24)
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#define SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA_MODE_PIXEL ((0) << 1)
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#define SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA_MODE_LAYER ((1) << 1)
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#define SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA_MODE_COMBINED ((2) << 1)
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#define SUN8I_MIXER_CHAN_VI_DS_N(x) ((x) << 16)
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#define SUN8I_MIXER_CHAN_VI_DS_M(x) ((x) << 0)
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struct sun8i_mixer;
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struct sun8i_layer;
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struct sun8i_layer *sun8i_vi_layer_init_one(struct drm_device *drm,
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struct sun8i_mixer *mixer,
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int index);
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#endif /* _SUN8I_VI_LAYER_H_ */
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