Marc Zyngier 674e701270 arm64: Document workaround for Cortex-A72 erratum
We already have a workaround for Cortex-A57 erratum ,
but Cortex-A72 r0p0 to r0p2 do suffer from the same issue
(known as erratum ).

Let's document the fact that we already handle this.

Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2016-08-17 12:23:47 +02:00
..
2016-03-17 20:03:47 -07:00
2016-07-03 23:41:27 +02:00