James Hogan 67dca66751 MIPS: perf: Allow for more perf events
In mipsxx_pmu_map_raw_event(), set event_id to base_id after the cpu
type conditional code to allow that code to override the base_id to use
more bits from the config and a higher bit for parity.

This will allow cores with up to 512 events between all even/odd
counters (an 8-bit event id) such as P5600 to use bit 8 for parity.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7243/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-08-02 00:06:38 +02:00
..
2013-11-26 12:12:27 +01:00
2014-08-02 00:06:38 +02:00
2014-06-25 14:17:03 +02:00
2013-02-01 10:00:22 +01:00
2014-05-30 16:10:20 +02:00
2014-05-24 00:07:01 +02:00