6815d8b092
The external trigger stamp FIFO was introduced as a new feature for QorIQ 1588 timer IP block. This patch is to support it by adding a new dts property "fsl,extts-fifo". Any QorIQ 1588 timer supporting this feature is required to add this property in its dts node. In addition, the FIFO should be cleaned up before enabling external trigger interrupts. Otherwise, there will be interrupts immediately just after enabling external trigger interrupts. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
630 lines
15 KiB
C
630 lines
15 KiB
C
/*
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* PTP 1588 clock for Freescale QorIQ 1588 timer
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*
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* Copyright (C) 2010 OMICRON electronics GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/device.h>
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#include <linux/hrtimer.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_platform.h>
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#include <linux/timex.h>
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#include <linux/slab.h>
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#include <linux/clk.h>
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#include <linux/fsl/ptp_qoriq.h>
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/*
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* Register access functions
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*/
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/* Caller must hold qoriq_ptp->lock. */
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static u64 tmr_cnt_read(struct qoriq_ptp *qoriq_ptp)
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{
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struct qoriq_ptp_registers *regs = &qoriq_ptp->regs;
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u64 ns;
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u32 lo, hi;
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lo = qoriq_read(®s->ctrl_regs->tmr_cnt_l);
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hi = qoriq_read(®s->ctrl_regs->tmr_cnt_h);
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ns = ((u64) hi) << 32;
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ns |= lo;
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return ns;
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}
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/* Caller must hold qoriq_ptp->lock. */
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static void tmr_cnt_write(struct qoriq_ptp *qoriq_ptp, u64 ns)
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{
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struct qoriq_ptp_registers *regs = &qoriq_ptp->regs;
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u32 hi = ns >> 32;
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u32 lo = ns & 0xffffffff;
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qoriq_write(®s->ctrl_regs->tmr_cnt_l, lo);
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qoriq_write(®s->ctrl_regs->tmr_cnt_h, hi);
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}
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/* Caller must hold qoriq_ptp->lock. */
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static void set_alarm(struct qoriq_ptp *qoriq_ptp)
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{
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struct qoriq_ptp_registers *regs = &qoriq_ptp->regs;
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u64 ns;
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u32 lo, hi;
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ns = tmr_cnt_read(qoriq_ptp) + 1500000000ULL;
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ns = div_u64(ns, 1000000000UL) * 1000000000ULL;
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ns -= qoriq_ptp->tclk_period;
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hi = ns >> 32;
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lo = ns & 0xffffffff;
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qoriq_write(®s->alarm_regs->tmr_alarm1_l, lo);
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qoriq_write(®s->alarm_regs->tmr_alarm1_h, hi);
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}
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/* Caller must hold qoriq_ptp->lock. */
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static void set_fipers(struct qoriq_ptp *qoriq_ptp)
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{
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struct qoriq_ptp_registers *regs = &qoriq_ptp->regs;
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set_alarm(qoriq_ptp);
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qoriq_write(®s->fiper_regs->tmr_fiper1, qoriq_ptp->tmr_fiper1);
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qoriq_write(®s->fiper_regs->tmr_fiper2, qoriq_ptp->tmr_fiper2);
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}
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static int extts_clean_up(struct qoriq_ptp *qoriq_ptp, int index,
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bool update_event)
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{
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struct qoriq_ptp_registers *regs = &qoriq_ptp->regs;
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struct ptp_clock_event event;
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void __iomem *reg_etts_l;
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void __iomem *reg_etts_h;
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u32 valid, stat, lo, hi;
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switch (index) {
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case 0:
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valid = ETS1_VLD;
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reg_etts_l = ®s->etts_regs->tmr_etts1_l;
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reg_etts_h = ®s->etts_regs->tmr_etts1_h;
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break;
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case 1:
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valid = ETS2_VLD;
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reg_etts_l = ®s->etts_regs->tmr_etts2_l;
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reg_etts_h = ®s->etts_regs->tmr_etts2_h;
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break;
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default:
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return -EINVAL;
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}
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event.type = PTP_CLOCK_EXTTS;
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event.index = index;
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do {
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lo = qoriq_read(reg_etts_l);
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hi = qoriq_read(reg_etts_h);
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if (update_event) {
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event.timestamp = ((u64) hi) << 32;
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event.timestamp |= lo;
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ptp_clock_event(qoriq_ptp->clock, &event);
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}
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stat = qoriq_read(®s->ctrl_regs->tmr_stat);
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} while (qoriq_ptp->extts_fifo_support && (stat & valid));
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return 0;
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}
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/*
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* Interrupt service routine
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*/
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static irqreturn_t isr(int irq, void *priv)
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{
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struct qoriq_ptp *qoriq_ptp = priv;
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struct qoriq_ptp_registers *regs = &qoriq_ptp->regs;
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struct ptp_clock_event event;
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u64 ns;
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u32 ack = 0, lo, hi, mask, val, irqs;
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spin_lock(&qoriq_ptp->lock);
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val = qoriq_read(®s->ctrl_regs->tmr_tevent);
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mask = qoriq_read(®s->ctrl_regs->tmr_temask);
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spin_unlock(&qoriq_ptp->lock);
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irqs = val & mask;
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if (irqs & ETS1) {
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ack |= ETS1;
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extts_clean_up(qoriq_ptp, 0, true);
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}
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if (irqs & ETS2) {
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ack |= ETS2;
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extts_clean_up(qoriq_ptp, 1, true);
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}
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if (irqs & ALM2) {
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ack |= ALM2;
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if (qoriq_ptp->alarm_value) {
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event.type = PTP_CLOCK_ALARM;
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event.index = 0;
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event.timestamp = qoriq_ptp->alarm_value;
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ptp_clock_event(qoriq_ptp->clock, &event);
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}
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if (qoriq_ptp->alarm_interval) {
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ns = qoriq_ptp->alarm_value + qoriq_ptp->alarm_interval;
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hi = ns >> 32;
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lo = ns & 0xffffffff;
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qoriq_write(®s->alarm_regs->tmr_alarm2_l, lo);
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qoriq_write(®s->alarm_regs->tmr_alarm2_h, hi);
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qoriq_ptp->alarm_value = ns;
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} else {
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spin_lock(&qoriq_ptp->lock);
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mask = qoriq_read(®s->ctrl_regs->tmr_temask);
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mask &= ~ALM2EN;
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qoriq_write(®s->ctrl_regs->tmr_temask, mask);
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spin_unlock(&qoriq_ptp->lock);
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qoriq_ptp->alarm_value = 0;
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qoriq_ptp->alarm_interval = 0;
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}
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}
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if (irqs & PP1) {
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ack |= PP1;
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event.type = PTP_CLOCK_PPS;
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ptp_clock_event(qoriq_ptp->clock, &event);
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}
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if (ack) {
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qoriq_write(®s->ctrl_regs->tmr_tevent, ack);
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return IRQ_HANDLED;
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} else
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return IRQ_NONE;
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}
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/*
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* PTP clock operations
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*/
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static int ptp_qoriq_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)
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{
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u64 adj, diff;
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u32 tmr_add;
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int neg_adj = 0;
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struct qoriq_ptp *qoriq_ptp = container_of(ptp, struct qoriq_ptp, caps);
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struct qoriq_ptp_registers *regs = &qoriq_ptp->regs;
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if (scaled_ppm < 0) {
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neg_adj = 1;
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scaled_ppm = -scaled_ppm;
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}
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tmr_add = qoriq_ptp->tmr_add;
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adj = tmr_add;
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/* calculate diff as adj*(scaled_ppm/65536)/1000000
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* and round() to the nearest integer
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*/
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adj *= scaled_ppm;
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diff = div_u64(adj, 8000000);
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diff = (diff >> 13) + ((diff >> 12) & 1);
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tmr_add = neg_adj ? tmr_add - diff : tmr_add + diff;
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qoriq_write(®s->ctrl_regs->tmr_add, tmr_add);
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return 0;
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}
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static int ptp_qoriq_adjtime(struct ptp_clock_info *ptp, s64 delta)
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{
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s64 now;
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unsigned long flags;
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struct qoriq_ptp *qoriq_ptp = container_of(ptp, struct qoriq_ptp, caps);
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spin_lock_irqsave(&qoriq_ptp->lock, flags);
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now = tmr_cnt_read(qoriq_ptp);
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now += delta;
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tmr_cnt_write(qoriq_ptp, now);
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set_fipers(qoriq_ptp);
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spin_unlock_irqrestore(&qoriq_ptp->lock, flags);
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return 0;
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}
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static int ptp_qoriq_gettime(struct ptp_clock_info *ptp,
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struct timespec64 *ts)
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{
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u64 ns;
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unsigned long flags;
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struct qoriq_ptp *qoriq_ptp = container_of(ptp, struct qoriq_ptp, caps);
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spin_lock_irqsave(&qoriq_ptp->lock, flags);
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ns = tmr_cnt_read(qoriq_ptp);
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spin_unlock_irqrestore(&qoriq_ptp->lock, flags);
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*ts = ns_to_timespec64(ns);
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return 0;
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}
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static int ptp_qoriq_settime(struct ptp_clock_info *ptp,
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const struct timespec64 *ts)
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{
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u64 ns;
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unsigned long flags;
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struct qoriq_ptp *qoriq_ptp = container_of(ptp, struct qoriq_ptp, caps);
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ns = timespec64_to_ns(ts);
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spin_lock_irqsave(&qoriq_ptp->lock, flags);
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tmr_cnt_write(qoriq_ptp, ns);
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set_fipers(qoriq_ptp);
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spin_unlock_irqrestore(&qoriq_ptp->lock, flags);
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return 0;
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}
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static int ptp_qoriq_enable(struct ptp_clock_info *ptp,
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struct ptp_clock_request *rq, int on)
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{
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struct qoriq_ptp *qoriq_ptp = container_of(ptp, struct qoriq_ptp, caps);
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struct qoriq_ptp_registers *regs = &qoriq_ptp->regs;
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unsigned long flags;
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u32 bit, mask = 0;
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switch (rq->type) {
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case PTP_CLK_REQ_EXTTS:
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switch (rq->extts.index) {
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case 0:
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bit = ETS1EN;
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break;
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case 1:
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bit = ETS2EN;
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break;
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default:
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return -EINVAL;
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}
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if (on)
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extts_clean_up(qoriq_ptp, rq->extts.index, false);
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break;
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case PTP_CLK_REQ_PPS:
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bit = PP1EN;
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break;
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default:
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return -EOPNOTSUPP;
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}
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spin_lock_irqsave(&qoriq_ptp->lock, flags);
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mask = qoriq_read(®s->ctrl_regs->tmr_temask);
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if (on) {
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mask |= bit;
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qoriq_write(®s->ctrl_regs->tmr_tevent, bit);
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} else {
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mask &= ~bit;
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}
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qoriq_write(®s->ctrl_regs->tmr_temask, mask);
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spin_unlock_irqrestore(&qoriq_ptp->lock, flags);
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return 0;
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}
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static const struct ptp_clock_info ptp_qoriq_caps = {
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.owner = THIS_MODULE,
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.name = "qoriq ptp clock",
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.max_adj = 512000,
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.n_alarm = 0,
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.n_ext_ts = N_EXT_TS,
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.n_per_out = 0,
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.n_pins = 0,
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.pps = 1,
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.adjfine = ptp_qoriq_adjfine,
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.adjtime = ptp_qoriq_adjtime,
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.gettime64 = ptp_qoriq_gettime,
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.settime64 = ptp_qoriq_settime,
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.enable = ptp_qoriq_enable,
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};
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/**
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* qoriq_ptp_nominal_freq - calculate nominal frequency according to
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* reference clock frequency
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*
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* @clk_src: reference clock frequency
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*
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* The nominal frequency is the desired clock frequency.
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* It should be less than the reference clock frequency.
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* It should be a factor of 1000MHz.
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*
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* Return the nominal frequency
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*/
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static u32 qoriq_ptp_nominal_freq(u32 clk_src)
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{
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u32 remainder = 0;
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clk_src /= 1000000;
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remainder = clk_src % 100;
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if (remainder) {
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clk_src -= remainder;
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clk_src += 100;
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}
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do {
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clk_src -= 100;
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} while (1000 % clk_src);
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return clk_src * 1000000;
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}
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/**
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* qoriq_ptp_auto_config - calculate a set of default configurations
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*
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* @qoriq_ptp: pointer to qoriq_ptp
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* @node: pointer to device_node
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*
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* If below dts properties are not provided, this function will be
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* called to calculate a set of default configurations for them.
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* "fsl,tclk-period"
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* "fsl,tmr-prsc"
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* "fsl,tmr-add"
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* "fsl,tmr-fiper1"
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* "fsl,tmr-fiper2"
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* "fsl,max-adj"
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*
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* Return 0 if success
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*/
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static int qoriq_ptp_auto_config(struct qoriq_ptp *qoriq_ptp,
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struct device_node *node)
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{
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struct clk *clk;
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u64 freq_comp;
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u64 max_adj;
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u32 nominal_freq;
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u32 remainder = 0;
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u32 clk_src = 0;
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qoriq_ptp->cksel = DEFAULT_CKSEL;
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clk = of_clk_get(node, 0);
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if (!IS_ERR(clk)) {
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clk_src = clk_get_rate(clk);
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clk_put(clk);
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}
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if (clk_src <= 100000000UL) {
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pr_err("error reference clock value, or lower than 100MHz\n");
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return -EINVAL;
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}
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nominal_freq = qoriq_ptp_nominal_freq(clk_src);
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if (!nominal_freq)
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return -EINVAL;
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qoriq_ptp->tclk_period = 1000000000UL / nominal_freq;
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qoriq_ptp->tmr_prsc = DEFAULT_TMR_PRSC;
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/* Calculate initial frequency compensation value for TMR_ADD register.
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* freq_comp = ceil(2^32 / freq_ratio)
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* freq_ratio = reference_clock_freq / nominal_freq
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*/
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freq_comp = ((u64)1 << 32) * nominal_freq;
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freq_comp = div_u64_rem(freq_comp, clk_src, &remainder);
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if (remainder)
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freq_comp++;
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qoriq_ptp->tmr_add = freq_comp;
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qoriq_ptp->tmr_fiper1 = DEFAULT_FIPER1_PERIOD - qoriq_ptp->tclk_period;
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qoriq_ptp->tmr_fiper2 = DEFAULT_FIPER2_PERIOD - qoriq_ptp->tclk_period;
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/* max_adj = 1000000000 * (freq_ratio - 1.0) - 1
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* freq_ratio = reference_clock_freq / nominal_freq
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*/
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max_adj = 1000000000ULL * (clk_src - nominal_freq);
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max_adj = div_u64(max_adj, nominal_freq) - 1;
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qoriq_ptp->caps.max_adj = max_adj;
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return 0;
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}
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static int qoriq_ptp_probe(struct platform_device *dev)
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{
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struct device_node *node = dev->dev.of_node;
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struct qoriq_ptp *qoriq_ptp;
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struct qoriq_ptp_registers *regs;
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struct timespec64 now;
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int err = -ENOMEM;
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u32 tmr_ctrl;
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unsigned long flags;
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void __iomem *base;
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qoriq_ptp = kzalloc(sizeof(*qoriq_ptp), GFP_KERNEL);
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if (!qoriq_ptp)
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goto no_memory;
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err = -EINVAL;
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qoriq_ptp->caps = ptp_qoriq_caps;
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if (of_property_read_u32(node, "fsl,cksel", &qoriq_ptp->cksel))
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qoriq_ptp->cksel = DEFAULT_CKSEL;
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if (of_property_read_bool(node, "fsl,extts-fifo"))
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qoriq_ptp->extts_fifo_support = true;
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else
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qoriq_ptp->extts_fifo_support = false;
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if (of_property_read_u32(node,
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"fsl,tclk-period", &qoriq_ptp->tclk_period) ||
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of_property_read_u32(node,
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"fsl,tmr-prsc", &qoriq_ptp->tmr_prsc) ||
|
|
of_property_read_u32(node,
|
|
"fsl,tmr-add", &qoriq_ptp->tmr_add) ||
|
|
of_property_read_u32(node,
|
|
"fsl,tmr-fiper1", &qoriq_ptp->tmr_fiper1) ||
|
|
of_property_read_u32(node,
|
|
"fsl,tmr-fiper2", &qoriq_ptp->tmr_fiper2) ||
|
|
of_property_read_u32(node,
|
|
"fsl,max-adj", &qoriq_ptp->caps.max_adj)) {
|
|
pr_warn("device tree node missing required elements, try automatic configuration\n");
|
|
|
|
if (qoriq_ptp_auto_config(qoriq_ptp, node))
|
|
goto no_config;
|
|
}
|
|
|
|
err = -ENODEV;
|
|
|
|
qoriq_ptp->irq = platform_get_irq(dev, 0);
|
|
|
|
if (qoriq_ptp->irq < 0) {
|
|
pr_err("irq not in device tree\n");
|
|
goto no_node;
|
|
}
|
|
if (request_irq(qoriq_ptp->irq, isr, IRQF_SHARED, DRIVER, qoriq_ptp)) {
|
|
pr_err("request_irq failed\n");
|
|
goto no_node;
|
|
}
|
|
|
|
qoriq_ptp->rsrc = platform_get_resource(dev, IORESOURCE_MEM, 0);
|
|
if (!qoriq_ptp->rsrc) {
|
|
pr_err("no resource\n");
|
|
goto no_resource;
|
|
}
|
|
if (request_resource(&iomem_resource, qoriq_ptp->rsrc)) {
|
|
pr_err("resource busy\n");
|
|
goto no_resource;
|
|
}
|
|
|
|
spin_lock_init(&qoriq_ptp->lock);
|
|
|
|
base = ioremap(qoriq_ptp->rsrc->start,
|
|
resource_size(qoriq_ptp->rsrc));
|
|
if (!base) {
|
|
pr_err("ioremap ptp registers failed\n");
|
|
goto no_ioremap;
|
|
}
|
|
|
|
qoriq_ptp->base = base;
|
|
|
|
if (of_device_is_compatible(node, "fsl,fman-ptp-timer")) {
|
|
qoriq_ptp->regs.ctrl_regs = base + FMAN_CTRL_REGS_OFFSET;
|
|
qoriq_ptp->regs.alarm_regs = base + FMAN_ALARM_REGS_OFFSET;
|
|
qoriq_ptp->regs.fiper_regs = base + FMAN_FIPER_REGS_OFFSET;
|
|
qoriq_ptp->regs.etts_regs = base + FMAN_ETTS_REGS_OFFSET;
|
|
} else {
|
|
qoriq_ptp->regs.ctrl_regs = base + CTRL_REGS_OFFSET;
|
|
qoriq_ptp->regs.alarm_regs = base + ALARM_REGS_OFFSET;
|
|
qoriq_ptp->regs.fiper_regs = base + FIPER_REGS_OFFSET;
|
|
qoriq_ptp->regs.etts_regs = base + ETTS_REGS_OFFSET;
|
|
}
|
|
|
|
ktime_get_real_ts64(&now);
|
|
ptp_qoriq_settime(&qoriq_ptp->caps, &now);
|
|
|
|
tmr_ctrl =
|
|
(qoriq_ptp->tclk_period & TCLK_PERIOD_MASK) << TCLK_PERIOD_SHIFT |
|
|
(qoriq_ptp->cksel & CKSEL_MASK) << CKSEL_SHIFT;
|
|
|
|
spin_lock_irqsave(&qoriq_ptp->lock, flags);
|
|
|
|
regs = &qoriq_ptp->regs;
|
|
qoriq_write(®s->ctrl_regs->tmr_ctrl, tmr_ctrl);
|
|
qoriq_write(®s->ctrl_regs->tmr_add, qoriq_ptp->tmr_add);
|
|
qoriq_write(®s->ctrl_regs->tmr_prsc, qoriq_ptp->tmr_prsc);
|
|
qoriq_write(®s->fiper_regs->tmr_fiper1, qoriq_ptp->tmr_fiper1);
|
|
qoriq_write(®s->fiper_regs->tmr_fiper2, qoriq_ptp->tmr_fiper2);
|
|
set_alarm(qoriq_ptp);
|
|
qoriq_write(®s->ctrl_regs->tmr_ctrl, tmr_ctrl|FIPERST|RTPE|TE|FRD);
|
|
|
|
spin_unlock_irqrestore(&qoriq_ptp->lock, flags);
|
|
|
|
qoriq_ptp->clock = ptp_clock_register(&qoriq_ptp->caps, &dev->dev);
|
|
if (IS_ERR(qoriq_ptp->clock)) {
|
|
err = PTR_ERR(qoriq_ptp->clock);
|
|
goto no_clock;
|
|
}
|
|
qoriq_ptp->phc_index = ptp_clock_index(qoriq_ptp->clock);
|
|
|
|
platform_set_drvdata(dev, qoriq_ptp);
|
|
|
|
return 0;
|
|
|
|
no_clock:
|
|
iounmap(qoriq_ptp->base);
|
|
no_ioremap:
|
|
release_resource(qoriq_ptp->rsrc);
|
|
no_resource:
|
|
free_irq(qoriq_ptp->irq, qoriq_ptp);
|
|
no_config:
|
|
no_node:
|
|
kfree(qoriq_ptp);
|
|
no_memory:
|
|
return err;
|
|
}
|
|
|
|
static int qoriq_ptp_remove(struct platform_device *dev)
|
|
{
|
|
struct qoriq_ptp *qoriq_ptp = platform_get_drvdata(dev);
|
|
struct qoriq_ptp_registers *regs = &qoriq_ptp->regs;
|
|
|
|
qoriq_write(®s->ctrl_regs->tmr_temask, 0);
|
|
qoriq_write(®s->ctrl_regs->tmr_ctrl, 0);
|
|
|
|
ptp_clock_unregister(qoriq_ptp->clock);
|
|
iounmap(qoriq_ptp->base);
|
|
release_resource(qoriq_ptp->rsrc);
|
|
free_irq(qoriq_ptp->irq, qoriq_ptp);
|
|
kfree(qoriq_ptp);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct of_device_id match_table[] = {
|
|
{ .compatible = "fsl,etsec-ptp" },
|
|
{ .compatible = "fsl,fman-ptp-timer" },
|
|
{},
|
|
};
|
|
MODULE_DEVICE_TABLE(of, match_table);
|
|
|
|
static struct platform_driver qoriq_ptp_driver = {
|
|
.driver = {
|
|
.name = "ptp_qoriq",
|
|
.of_match_table = match_table,
|
|
},
|
|
.probe = qoriq_ptp_probe,
|
|
.remove = qoriq_ptp_remove,
|
|
};
|
|
|
|
module_platform_driver(qoriq_ptp_driver);
|
|
|
|
MODULE_AUTHOR("Richard Cochran <richardcochran@gmail.com>");
|
|
MODULE_DESCRIPTION("PTP clock for Freescale QorIQ 1588 timer");
|
|
MODULE_LICENSE("GPL");
|