3fdb59cf10
Intel Merrifield SPI is actually more closer to PXA3xx. It has extended FIFO (32 bytes) and additional registers to get or set FIFO thresholds. Introduce new type for Intel Merrifield SPI host controllers and handle bigger FIFO size. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20210510124134.24638-15-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
320 lines
7.7 KiB
C
320 lines
7.7 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* CE4100's SPI device is more or less the same one as found on PXA
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*
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* Copyright (C) 2016, Intel Corporation
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*/
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#include <linux/clk-provider.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/platform_device.h>
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#include <linux/spi/pxa2xx_spi.h>
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#include <linux/dmaengine.h>
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#include <linux/platform_data/dma-dw.h>
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enum {
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PORT_QUARK_X1000,
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PORT_BYT,
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PORT_MRFLD,
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PORT_BSW0,
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PORT_BSW1,
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PORT_BSW2,
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PORT_CE4100,
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PORT_LPT0,
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PORT_LPT1,
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};
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struct pxa_spi_info {
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enum pxa_ssp_type type;
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int port_id;
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int num_chipselect;
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unsigned long max_clk_rate;
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/* DMA channel request parameters */
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bool (*dma_filter)(struct dma_chan *chan, void *param);
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void *tx_param;
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void *rx_param;
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int dma_burst_size;
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int (*setup)(struct pci_dev *pdev, struct pxa_spi_info *c);
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};
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static struct dw_dma_slave byt_tx_param = { .dst_id = 0 };
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static struct dw_dma_slave byt_rx_param = { .src_id = 1 };
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static struct dw_dma_slave mrfld3_tx_param = { .dst_id = 15 };
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static struct dw_dma_slave mrfld3_rx_param = { .src_id = 14 };
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static struct dw_dma_slave mrfld5_tx_param = { .dst_id = 13 };
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static struct dw_dma_slave mrfld5_rx_param = { .src_id = 12 };
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static struct dw_dma_slave mrfld6_tx_param = { .dst_id = 11 };
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static struct dw_dma_slave mrfld6_rx_param = { .src_id = 10 };
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static struct dw_dma_slave bsw0_tx_param = { .dst_id = 0 };
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static struct dw_dma_slave bsw0_rx_param = { .src_id = 1 };
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static struct dw_dma_slave bsw1_tx_param = { .dst_id = 6 };
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static struct dw_dma_slave bsw1_rx_param = { .src_id = 7 };
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static struct dw_dma_slave bsw2_tx_param = { .dst_id = 8 };
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static struct dw_dma_slave bsw2_rx_param = { .src_id = 9 };
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static struct dw_dma_slave lpt1_tx_param = { .dst_id = 0 };
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static struct dw_dma_slave lpt1_rx_param = { .src_id = 1 };
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static struct dw_dma_slave lpt0_tx_param = { .dst_id = 2 };
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static struct dw_dma_slave lpt0_rx_param = { .src_id = 3 };
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static bool lpss_dma_filter(struct dma_chan *chan, void *param)
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{
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struct dw_dma_slave *dws = param;
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if (dws->dma_dev != chan->device->dev)
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return false;
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chan->private = dws;
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return true;
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}
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static int lpss_spi_setup(struct pci_dev *dev, struct pxa_spi_info *c)
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{
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struct pci_dev *dma_dev;
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c->num_chipselect = 1;
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c->max_clk_rate = 50000000;
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dma_dev = pci_get_slot(dev->bus, PCI_DEVFN(PCI_SLOT(dev->devfn), 0));
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if (c->tx_param) {
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struct dw_dma_slave *slave = c->tx_param;
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slave->dma_dev = &dma_dev->dev;
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slave->m_master = 0;
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slave->p_master = 1;
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}
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if (c->rx_param) {
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struct dw_dma_slave *slave = c->rx_param;
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slave->dma_dev = &dma_dev->dev;
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slave->m_master = 0;
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slave->p_master = 1;
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}
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c->dma_filter = lpss_dma_filter;
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return 0;
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}
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static int mrfld_spi_setup(struct pci_dev *dev, struct pxa_spi_info *c)
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{
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struct pci_dev *dma_dev = pci_get_slot(dev->bus, PCI_DEVFN(21, 0));
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struct dw_dma_slave *tx, *rx;
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switch (PCI_FUNC(dev->devfn)) {
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case 0:
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c->port_id = 3;
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c->num_chipselect = 1;
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c->tx_param = &mrfld3_tx_param;
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c->rx_param = &mrfld3_rx_param;
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break;
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case 1:
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c->port_id = 5;
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c->num_chipselect = 4;
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c->tx_param = &mrfld5_tx_param;
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c->rx_param = &mrfld5_rx_param;
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break;
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case 2:
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c->port_id = 6;
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c->num_chipselect = 1;
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c->tx_param = &mrfld6_tx_param;
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c->rx_param = &mrfld6_rx_param;
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break;
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default:
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return -ENODEV;
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}
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tx = c->tx_param;
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tx->dma_dev = &dma_dev->dev;
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rx = c->rx_param;
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rx->dma_dev = &dma_dev->dev;
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c->dma_filter = lpss_dma_filter;
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c->dma_burst_size = 8;
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return 0;
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}
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static struct pxa_spi_info spi_info_configs[] = {
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[PORT_CE4100] = {
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.type = PXA25x_SSP,
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.port_id = -1,
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.num_chipselect = -1,
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.max_clk_rate = 3686400,
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},
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[PORT_BYT] = {
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.type = LPSS_BYT_SSP,
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.port_id = 0,
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.setup = lpss_spi_setup,
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.tx_param = &byt_tx_param,
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.rx_param = &byt_rx_param,
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},
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[PORT_BSW0] = {
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.type = LPSS_BSW_SSP,
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.port_id = 0,
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.setup = lpss_spi_setup,
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.tx_param = &bsw0_tx_param,
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.rx_param = &bsw0_rx_param,
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},
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[PORT_BSW1] = {
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.type = LPSS_BSW_SSP,
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.port_id = 1,
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.setup = lpss_spi_setup,
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.tx_param = &bsw1_tx_param,
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.rx_param = &bsw1_rx_param,
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},
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[PORT_BSW2] = {
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.type = LPSS_BSW_SSP,
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.port_id = 2,
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.setup = lpss_spi_setup,
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.tx_param = &bsw2_tx_param,
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.rx_param = &bsw2_rx_param,
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},
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[PORT_MRFLD] = {
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.type = MRFLD_SSP,
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.max_clk_rate = 25000000,
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.setup = mrfld_spi_setup,
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},
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[PORT_QUARK_X1000] = {
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.type = QUARK_X1000_SSP,
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.port_id = -1,
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.num_chipselect = 1,
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.max_clk_rate = 50000000,
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},
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[PORT_LPT0] = {
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.type = LPSS_LPT_SSP,
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.port_id = 0,
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.setup = lpss_spi_setup,
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.tx_param = &lpt0_tx_param,
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.rx_param = &lpt0_rx_param,
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},
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[PORT_LPT1] = {
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.type = LPSS_LPT_SSP,
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.port_id = 1,
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.setup = lpss_spi_setup,
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.tx_param = &lpt1_tx_param,
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.rx_param = &lpt1_rx_param,
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},
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};
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static int pxa2xx_spi_pci_probe(struct pci_dev *dev,
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const struct pci_device_id *ent)
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{
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struct platform_device_info pi;
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int ret;
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struct platform_device *pdev;
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struct pxa2xx_spi_controller spi_pdata;
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struct ssp_device *ssp;
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struct pxa_spi_info *c;
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char buf[40];
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ret = pcim_enable_device(dev);
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if (ret)
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return ret;
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ret = pcim_iomap_regions(dev, 1 << 0, "PXA2xx SPI");
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if (ret)
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return ret;
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c = &spi_info_configs[ent->driver_data];
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if (c->setup) {
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ret = c->setup(dev, c);
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if (ret)
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return ret;
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}
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memset(&spi_pdata, 0, sizeof(spi_pdata));
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spi_pdata.num_chipselect = (c->num_chipselect > 0) ? c->num_chipselect : dev->devfn;
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spi_pdata.dma_filter = c->dma_filter;
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spi_pdata.tx_param = c->tx_param;
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spi_pdata.rx_param = c->rx_param;
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spi_pdata.enable_dma = c->rx_param && c->tx_param;
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spi_pdata.dma_burst_size = c->dma_burst_size ? c->dma_burst_size : 1;
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ssp = &spi_pdata.ssp;
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ssp->dev = &dev->dev;
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ssp->phys_base = pci_resource_start(dev, 0);
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ssp->mmio_base = pcim_iomap_table(dev)[0];
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ssp->port_id = (c->port_id >= 0) ? c->port_id : dev->devfn;
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ssp->type = c->type;
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pci_set_master(dev);
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ret = pci_alloc_irq_vectors(dev, 1, 1, PCI_IRQ_ALL_TYPES);
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if (ret < 0)
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return ret;
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ssp->irq = pci_irq_vector(dev, 0);
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snprintf(buf, sizeof(buf), "pxa2xx-spi.%d", ssp->port_id);
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ssp->clk = clk_register_fixed_rate(&dev->dev, buf, NULL, 0,
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c->max_clk_rate);
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if (IS_ERR(ssp->clk))
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return PTR_ERR(ssp->clk);
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memset(&pi, 0, sizeof(pi));
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pi.fwnode = dev->dev.fwnode;
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pi.parent = &dev->dev;
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pi.name = "pxa2xx-spi";
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pi.id = ssp->port_id;
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pi.data = &spi_pdata;
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pi.size_data = sizeof(spi_pdata);
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pdev = platform_device_register_full(&pi);
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if (IS_ERR(pdev)) {
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clk_unregister(ssp->clk);
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return PTR_ERR(pdev);
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}
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pci_set_drvdata(dev, pdev);
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return 0;
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}
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static void pxa2xx_spi_pci_remove(struct pci_dev *dev)
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{
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struct platform_device *pdev = pci_get_drvdata(dev);
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struct pxa2xx_spi_controller *spi_pdata;
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spi_pdata = dev_get_platdata(&pdev->dev);
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platform_device_unregister(pdev);
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clk_unregister(spi_pdata->ssp.clk);
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}
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static const struct pci_device_id pxa2xx_spi_pci_devices[] = {
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{ PCI_VDEVICE(INTEL, 0x0935), PORT_QUARK_X1000 },
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{ PCI_VDEVICE(INTEL, 0x0f0e), PORT_BYT },
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{ PCI_VDEVICE(INTEL, 0x1194), PORT_MRFLD },
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{ PCI_VDEVICE(INTEL, 0x228e), PORT_BSW0 },
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{ PCI_VDEVICE(INTEL, 0x2290), PORT_BSW1 },
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{ PCI_VDEVICE(INTEL, 0x22ac), PORT_BSW2 },
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{ PCI_VDEVICE(INTEL, 0x2e6a), PORT_CE4100 },
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{ PCI_VDEVICE(INTEL, 0x9c65), PORT_LPT0 },
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{ PCI_VDEVICE(INTEL, 0x9c66), PORT_LPT1 },
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{ PCI_VDEVICE(INTEL, 0x9ce5), PORT_LPT0 },
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{ PCI_VDEVICE(INTEL, 0x9ce6), PORT_LPT1 },
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{ }
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};
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MODULE_DEVICE_TABLE(pci, pxa2xx_spi_pci_devices);
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static struct pci_driver pxa2xx_spi_pci_driver = {
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.name = "pxa2xx_spi_pci",
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.id_table = pxa2xx_spi_pci_devices,
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.probe = pxa2xx_spi_pci_probe,
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.remove = pxa2xx_spi_pci_remove,
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};
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module_pci_driver(pxa2xx_spi_pci_driver);
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MODULE_DESCRIPTION("CE4100/LPSS PCI-SPI glue code for PXA's driver");
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MODULE_LICENSE("GPL v2");
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MODULE_AUTHOR("Sebastian Andrzej Siewior <bigeasy@linutronix.de>");
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