6af83b3861
When 'enable_off_mode' is 0, the target power state for MPU and CORE was locally changed to PWRDM_POWER_RET but, the statistics are updated for idle state originally selected by the governor. This patch 'invalidates' the idle states that lead either of MPU or Core to PWRDM_POWER_OFF state when 'enable_off_mode' is '0'. The states are valid once 'enable_off_mode' is set to '1'. Added function next_valid_state() to check if current state is valid; else get the next valid state. It is called from omap3_enter_idle_bm(). Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
69 lines
2.1 KiB
C
69 lines
2.1 KiB
C
/*
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* OMAP2/3 Power Management Routines
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*
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* Copyright (C) 2008 Nokia Corporation
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* Jouni Hogander
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ARCH_ARM_MACH_OMAP2_PM_H
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#define __ARCH_ARM_MACH_OMAP2_PM_H
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#include <plat/powerdomain.h>
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extern u32 enable_off_mode;
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extern u32 sleep_while_idle;
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extern void *omap3_secure_ram_storage;
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extern void omap3_pm_off_mode_enable(int);
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extern void omap_sram_idle(void);
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extern int omap3_can_sleep(void);
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extern int set_pwrdm_state(struct powerdomain *pwrdm, u32 state);
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extern int omap3_idle_init(void);
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extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
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extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
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extern u32 wakeup_timer_seconds;
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extern struct omap_dm_timer *gptimer_wakeup;
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#ifdef CONFIG_PM_DEBUG
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extern void omap2_pm_dump(int mode, int resume, unsigned int us);
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extern int omap2_pm_debug;
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#else
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#define omap2_pm_dump(mode, resume, us) do {} while (0);
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#define omap2_pm_debug 0
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#endif
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#if defined(CONFIG_CPU_IDLE)
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extern void omap3_cpuidle_update_states(void);
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#endif
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#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
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extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev);
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extern int pm_dbg_regset_save(int reg_set);
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extern int pm_dbg_regset_init(int reg_set);
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#else
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#define pm_dbg_update_time(pwrdm, prev) do {} while (0);
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#define pm_dbg_regset_save(reg_set) do {} while (0);
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#define pm_dbg_regset_init(reg_set) do {} while (0);
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#endif /* CONFIG_PM_DEBUG */
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extern void omap24xx_idle_loop_suspend(void);
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extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl,
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void __iomem *sdrc_power);
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extern void omap34xx_cpu_suspend(u32 *addr, int save_state);
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extern void save_secure_ram_context(u32 *addr);
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extern void omap3_save_scratchpad_contents(void);
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extern unsigned int omap24xx_idle_loop_suspend_sz;
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extern unsigned int omap34xx_suspend_sz;
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extern unsigned int save_secure_ram_context_sz;
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extern unsigned int omap24xx_cpu_suspend_sz;
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extern unsigned int omap34xx_cpu_suspend_sz;
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#endif
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