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The PLL is disabled when the corresponding bit is set not the other
way around. This commit depends on my other commit with Subject
"ASoC: WM8804: Refactor set_pll code to avoid GCC warnings".
Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
6c20c807cf