linux/arch/arm64/kvm
Andre Przywara 6d52f35af1 arm64: KVM: add SGI generation register emulation
While the generation of a (virtual) inter-processor interrupt (SGI)
on a GICv2 works by writing to a MMIO register, GICv3 uses the system
register ICC_SGI1R_EL1 to trigger them.
Add a trap handler function that calls the new SGI register handler
in the GICv3 code. As ICC_SRE_EL1.SRE at this point is still always 0,
this will not trap yet, but will only be used later when all the data
structures have been initialized properly.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2015-01-20 18:25:32 +01:00
..
emulate.c arm64: KVM: 32bit conditional execution emulation 2013-06-12 16:42:15 +01:00
guest.c arm/arm64: KVM: Clarify KVM_ARM_VCPU_INIT ABI 2014-12-13 14:15:26 +01:00
handle_exit.c arm/arm64: KVM: add tracing support for arm64 exit handler 2015-01-15 12:43:30 +01:00
hyp-init.S ARM/ARM64: KVM: Nuke Hyp-mode tlbs before enabling MMU 2014-08-29 11:53:26 +02:00
hyp.S KVM: arm64: Add HYP interface to flush VM Stage 1/2 TLB entries 2015-01-16 14:42:49 +01:00
inject_fault.c arm64: KVM: 32bit guest fault injection 2013-06-12 16:42:18 +01:00
Kconfig KVM: arm/arm64: Enable Dirty Page logging for ARMv8 2015-01-16 14:42:49 +01:00
Makefile arm/arm64: KVM: add virtual GICv3 distributor emulation 2015-01-20 18:25:31 +01:00
regmap.c arm64: KVM: 32bit GP register access 2013-06-12 16:42:14 +01:00
reset.c arm64: KVM: enable initialization of a 32bit vcpu 2013-06-12 16:42:18 +01:00
sys_regs_generic_v8.c arm64: KVM: Enable minimalistic support for Cortex-A53 2014-05-25 20:05:30 +02:00
sys_regs.c arm64: KVM: add SGI generation register emulation 2015-01-20 18:25:32 +01:00
sys_regs.h arm64: KVM: allows discrimination of AArch32 sysreg access 2014-03-03 01:15:21 +00:00
trace.h arm/arm64: KVM: add tracing support for arm64 exit handler 2015-01-15 12:43:30 +01:00
vgic-v2-switch.S arm/arm64: KVM: Fix BE accesses to GICv2 EISR and ELRSR regs 2014-10-16 10:57:41 +02:00
vgic-v3-switch.S arm/arm64: KVM: make the value of ICC_SRE_EL1 a per-VM variable 2015-01-20 18:25:28 +01:00