6eee33e87f
We wish to start segregating the power management into different control domains, both with respect to the hardware and the user interface. The first step is that at the lowest level flow of requests, we want to process a context event (and not a global GEM operation). In this patch, we introduce the context callbacks that in future patches will be redirected to per-engine interfaces leading to global operations as required. The intent is that this will be guarded by the timeline->mutex, except that retiring has not quite finished transitioning over from being guarded by struct_mutex. So at the moment it is protected by struct_mutex with a reminded to switch. v2: Rename default handlers to intel_context_enter_engine. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190424200717.1686-3-chris@chris-wilson.co.uk
109 lines
2.7 KiB
C
109 lines
2.7 KiB
C
/*
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* SPDX-License-Identifier: MIT
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*
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* Copyright © 2019 Intel Corporation
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*/
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#ifndef __INTEL_CONTEXT_H__
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#define __INTEL_CONTEXT_H__
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#include <linux/lockdep.h>
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#include "intel_context_types.h"
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#include "intel_engine_types.h"
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struct intel_context *intel_context_alloc(void);
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void intel_context_free(struct intel_context *ce);
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void intel_context_init(struct intel_context *ce,
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struct i915_gem_context *ctx,
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struct intel_engine_cs *engine);
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/**
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* intel_context_lookup - Find the matching HW context for this (ctx, engine)
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* @ctx - the parent GEM context
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* @engine - the target HW engine
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*
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* May return NULL if the HW context hasn't been instantiated (i.e. unused).
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*/
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struct intel_context *
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intel_context_lookup(struct i915_gem_context *ctx,
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struct intel_engine_cs *engine);
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/**
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* intel_context_pin_lock - Stablises the 'pinned' status of the HW context
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* @ctx - the parent GEM context
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* @engine - the target HW engine
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*
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* Acquire a lock on the pinned status of the HW context, such that the context
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* can neither be bound to the GPU or unbound whilst the lock is held, i.e.
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* intel_context_is_pinned() remains stable.
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*/
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struct intel_context *
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intel_context_pin_lock(struct i915_gem_context *ctx,
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struct intel_engine_cs *engine);
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static inline bool
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intel_context_is_pinned(struct intel_context *ce)
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{
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return atomic_read(&ce->pin_count);
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}
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static inline void intel_context_pin_unlock(struct intel_context *ce)
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__releases(ce->pin_mutex)
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{
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mutex_unlock(&ce->pin_mutex);
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}
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struct intel_context *
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__intel_context_insert(struct i915_gem_context *ctx,
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struct intel_engine_cs *engine,
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struct intel_context *ce);
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void
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__intel_context_remove(struct intel_context *ce);
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struct intel_context *
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intel_context_pin(struct i915_gem_context *ctx, struct intel_engine_cs *engine);
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static inline void __intel_context_pin(struct intel_context *ce)
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{
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GEM_BUG_ON(!intel_context_is_pinned(ce));
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atomic_inc(&ce->pin_count);
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}
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void intel_context_unpin(struct intel_context *ce);
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void intel_context_enter_engine(struct intel_context *ce);
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void intel_context_exit_engine(struct intel_context *ce);
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static inline void intel_context_enter(struct intel_context *ce)
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{
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if (!ce->active_count++)
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ce->ops->enter(ce);
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}
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static inline void intel_context_mark_active(struct intel_context *ce)
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{
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++ce->active_count;
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}
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static inline void intel_context_exit(struct intel_context *ce)
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{
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GEM_BUG_ON(!ce->active_count);
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if (!--ce->active_count)
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ce->ops->exit(ce);
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}
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static inline struct intel_context *intel_context_get(struct intel_context *ce)
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{
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kref_get(&ce->ref);
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return ce;
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}
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static inline void intel_context_put(struct intel_context *ce)
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{
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kref_put(&ce->ref, ce->ops->destroy);
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}
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#endif /* __INTEL_CONTEXT_H__ */
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