3d21a46093
json-schema versions draft7 and earlier have a weird behavior in that any keywords combined with a '$ref' are ignored (silently). The correct form was to put a '$ref' under an 'allOf'. This behavior is now changed in the 2019-09 json-schema spec and '$ref' can be mixed with other keywords. The json-schema library doesn't yet support this, but the tooling now does a fixup for this and either way works. This has been a constant source of review comments, so let's change this treewide so everyone copies the simpler syntax. Scripted with ruamel.yaml with some manual fixups. Some minor whitespace changes from the script. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Maxime Ripard <mripard@kernel.org> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-By: Vinod Koul <vkoul@kernel.org> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Acked-by: Wolfram Sang <wsa@the-dreams.de> # for I2C Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> #for-iio Reviewed-by: Stephen Boyd <sboyd@kernel.org> # clock Signed-off-by: Rob Herring <robh@kernel.org>
125 lines
3.2 KiB
YAML
125 lines
3.2 KiB
YAML
# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/timer/arm,arch_timer_mmio.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: ARM memory mapped architected timer
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maintainers:
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- Marc Zyngier <marc.zyngier@arm.com>
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- Mark Rutland <mark.rutland@arm.com>
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description: |+
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ARM cores may have a memory mapped architected timer, which provides up to 8
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frames with a physical and optional virtual timer per frame.
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The memory mapped timer is attached to a GIC to deliver its interrupts via SPIs.
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properties:
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compatible:
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items:
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- enum:
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- arm,armv7-timer-mem
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reg:
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maxItems: 1
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description: The control frame base address
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'#address-cells':
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enum: [1, 2]
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'#size-cells':
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const: 1
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ranges: true
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clock-frequency:
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description: The frequency of the main counter, in Hz. Should be present
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only where necessary to work around broken firmware which does not configure
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CNTFRQ on all CPUs to a uniform correct value. Use of this property is
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strongly discouraged; fix your firmware unless absolutely impossible.
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always-on:
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type: boolean
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description: If present, the timer is powered through an always-on power
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domain, therefore it never loses context.
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arm,cpu-registers-not-fw-configured:
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type: boolean
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description: Firmware does not initialize any of the generic timer CPU
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registers, which contain their architecturally-defined reset values. Only
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supported for 32-bit systems which follow the ARMv7 architected reset
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values.
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arm,no-tick-in-suspend:
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type: boolean
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description: The main counter does not tick when the system is in
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low-power system suspend on some SoCs. This behavior does not match the
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Architecture Reference Manual's specification that the system counter "must
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be implemented in an always-on power domain."
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patternProperties:
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'^frame@[0-9a-z]*$':
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type: object
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description: A timer node has up to 8 frame sub-nodes, each with the following properties.
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properties:
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frame-number:
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$ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0
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maximum: 7
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interrupts:
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minItems: 1
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maxItems: 2
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items:
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- description: physical timer irq
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- description: virtual timer irq
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reg:
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minItems: 1
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maxItems: 2
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items:
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- description: 1st view base address
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- description: 2nd optional view base address
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required:
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- frame-number
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- interrupts
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- reg
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required:
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- compatible
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- reg
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- '#address-cells'
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- '#size-cells'
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additionalProperties: false
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examples:
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- |
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timer@f0000000 {
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compatible = "arm,armv7-timer-mem";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0xf0001000 0x1000>;
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reg = <0xf0000000 0x1000>;
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clock-frequency = <50000000>;
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frame@0 {
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frame-number = <0>;
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interrupts = <0 13 0x8>,
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<0 14 0x8>;
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reg = <0x0000 0x1000>,
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<0x1000 0x1000>;
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};
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frame@2000 {
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frame-number = <1>;
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interrupts = <0 15 0x8>;
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reg = <0x2000 0x1000>;
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};
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};
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...
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