53526bef0a
update mtk-wdt document for MT8192 platform Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Link: https://lore.kernel.org/r/20201014131936.20584-3-crystal.guo@mediatek.com Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
32 lines
929 B
Plaintext
32 lines
929 B
Plaintext
Mediatek SoCs Watchdog timer
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Required properties:
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- compatible should contain:
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"mediatek,mt2701-wdt", "mediatek,mt6589-wdt": for MT2701
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"mediatek,mt2712-wdt": for MT2712
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"mediatek,mt6589-wdt": for MT6589
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"mediatek,mt6797-wdt", "mediatek,mt6589-wdt": for MT6797
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"mediatek,mt7622-wdt", "mediatek,mt6589-wdt": for MT7622
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"mediatek,mt7623-wdt", "mediatek,mt6589-wdt": for MT7623
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"mediatek,mt7629-wdt", "mediatek,mt6589-wdt": for MT7629
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"mediatek,mt8183-wdt": for MT8183
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"mediatek,mt8516-wdt", "mediatek,mt6589-wdt": for MT8516
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"mediatek,mt8192-wdt": for MT8192
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- reg : Specifies base physical address and size of the registers.
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Optional properties:
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- timeout-sec: contains the watchdog timeout in seconds.
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- #reset-cells: Should be 1.
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Example:
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watchdog: watchdog@10007000 {
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compatible = "mediatek,mt8183-wdt",
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"mediatek,mt6589-wdt";
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reg = <0 0x10007000 0 0x100>;
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timeout-sec = <10>;
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#reset-cells = <1>;
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};
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