91f93c3839
Running 'dt-validate -m' will flag any compatible strings missing a schema. Fix all the errors found in DT binding examples. Most of these are just typos. Cc: Stephen Boyd <sboyd@kernel.org> Cc: Chen-Yu Tsai <wens@csie.org> Cc: Herbert Xu <herbert@gondor.apana.org.au> Cc: "David S. Miller" <davem@davemloft.net> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Cc: Avi Fishman <avifishman70@gmail.com> Cc: Tomer Maimon <tmaimon77@gmail.com> Cc: Tali Perry <tali.perry1@gmail.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: Will Deacon <will@kernel.org> Cc: Joel Stanley <joel@jms.id.au> Cc: Wim Van Sebroeck <wim@linux-watchdog.org> Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Cc: Vincent Cheng <vincent.cheng.xh@renesas.com> Cc: linux-clk@vger.kernel.org Cc: linux-crypto@vger.kernel.org Cc: linux-gpio@vger.kernel.org Cc: linux-i2c@vger.kernel.org Cc: iommu@lists.linux-foundation.org Cc: linux-watchdog@vger.kernel.org Reviewed-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Acked-by: Maxime Ripard <mripard@kernel.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Daniel Palmer <daniel@thingy.jp> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210202205544.24812-1-robh@kernel.org
68 lines
1.5 KiB
YAML
68 lines
1.5 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/watchdog/ti,rti-wdt.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Texas Instruments K3 SoC Watchdog Timer
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maintainers:
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- Tero Kristo <t-kristo@ti.com>
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description:
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The TI K3 SoC watchdog timer is implemented via the RTI (Real Time
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Interrupt) IP module. This timer adds a support for windowed watchdog
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mode, which will signal an error if it is pinged outside the watchdog
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time window, meaning either too early or too late. The error signal
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generated can be routed to either interrupt a safety controller or
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to directly reset the SoC.
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allOf:
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- $ref: "watchdog.yaml#"
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properties:
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compatible:
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enum:
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- ti,j7-rti-wdt
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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power-domains:
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maxItems: 1
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assigned-clocks:
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maxItems: 1
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assigned-clocks-parents:
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maxItems: 1
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required:
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- compatible
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- reg
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- clocks
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- power-domains
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unevaluatedProperties: false
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examples:
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- |
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/*
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* RTI WDT in main domain on J721e SoC. Assigned clocks are used to
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* select the source clock for the watchdog, forcing it to tick with
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* a 32kHz clock in this case.
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*/
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#include <dt-bindings/soc/ti,sci_pm_domain.h>
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watchdog@2200000 {
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compatible = "ti,j7-rti-wdt";
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reg = <0x2200000 0x100>;
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clocks = <&k3_clks 252 1>;
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power-domains = <&k3_pds 252 TI_SCI_PD_EXCLUSIVE>;
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assigned-clocks = <&k3_clks 252 1>;
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assigned-clock-parents = <&k3_clks 252 5>;
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};
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