7001052160
coarse grained, hardware based, forward edge Control-Flow-Integrity mechanism where any indirect CALL/JMP must target an ENDBR instruction or suffer #CP. Additionally, since Alderlake (12th gen)/Sapphire-Rapids, speculation is limited to 2 instructions (and typically fewer) on branch targets not starting with ENDBR. CET-IBT also limits speculation of the next sequential instruction after the indirect CALL/JMP [1]. CET-IBT is fundamentally incompatible with retpolines, but provides, as described above, speculation limits itself. [1] https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/technical-documentation/branch-history-injection.html -----BEGIN PGP SIGNATURE----- iQJJBAABCgAzFiEEv3OU3/byMaA0LqWJdkfhpEvA5LoFAmI/LI8VHHBldGVyekBp bmZyYWRlYWQub3JnAAoJEHZH4aRLwOS6ZnkP/2QCgQLTu6oRxv9O020CHwlaSEeD 1Hoy3loum5q5hAi1Ik3dR9p0H5u64c9qbrBVxaFoNKaLt5GKrtHaDSHNk2L/CFHX urpH65uvTLxbyZzcahkAahoJ71XU+m7PcrHLWMunw9sy10rExYVsUOlFyoyG6XCF BDCNZpdkC09ZM3vwlWGMZd5Pp+6HcZNPyoV9tpvWAS2l+WYFWAID7mflbpQ+tA8b y/hM6b3Ud0rT2ubuG1iUpopgNdwqQZ+HisMPGprh+wKZkYwS2l8pUTrz0MaBkFde go7fW16kFy2HQzGm6aIEBmfcg0palP/mFVaWP0zS62LwhJSWTn5G6xWBr3yxSsht 9gWCiI0oDZuTg698MedWmomdG2SK6yAuZuqmdKtLLoWfWgviPEi7TDFG/cKtZdAW ag8GM8T4iyYZzpCEcWO9GWbjo6TTGq30JBQefCBG47GjD0csv2ubXXx0Iey+jOwT x3E8wnv9dl8V9FSd/tMpTFmje8ges23yGrWtNpb5BRBuWTeuGiBPZED2BNyyIf+T dmewi2ufNMONgyNp27bDKopY81CPAQq9cVxqNm9Cg3eWPFnpOq2KGYEvisZ/rpEL EjMQeUBsy/C3AUFAleu1vwNnkwP/7JfKYpN00gnSyeQNZpqwxXBCKnHNgOMTXyJz beB/7u2KIUbKEkSN =jZfK -----END PGP SIGNATURE----- Merge tag 'x86_core_for_5.18_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 CET-IBT (Control-Flow-Integrity) support from Peter Zijlstra: "Add support for Intel CET-IBT, available since Tigerlake (11th gen), which is a coarse grained, hardware based, forward edge Control-Flow-Integrity mechanism where any indirect CALL/JMP must target an ENDBR instruction or suffer #CP. Additionally, since Alderlake (12th gen)/Sapphire-Rapids, speculation is limited to 2 instructions (and typically fewer) on branch targets not starting with ENDBR. CET-IBT also limits speculation of the next sequential instruction after the indirect CALL/JMP [1]. CET-IBT is fundamentally incompatible with retpolines, but provides, as described above, speculation limits itself" [1] https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/technical-documentation/branch-history-injection.html * tag 'x86_core_for_5.18_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (53 commits) kvm/emulate: Fix SETcc emulation for ENDBR x86/Kconfig: Only allow CONFIG_X86_KERNEL_IBT with ld.lld >= 14.0.0 x86/Kconfig: Only enable CONFIG_CC_HAS_IBT for clang >= 14.0.0 kbuild: Fixup the IBT kbuild changes x86/Kconfig: Do not allow CONFIG_X86_X32_ABI=y with llvm-objcopy x86: Remove toolchain check for X32 ABI capability x86/alternative: Use .ibt_endbr_seal to seal indirect calls objtool: Find unused ENDBR instructions objtool: Validate IBT assumptions objtool: Add IBT/ENDBR decoding objtool: Read the NOENDBR annotation x86: Annotate idtentry_df() x86,objtool: Move the ASM_REACHABLE annotation to objtool.h x86: Annotate call_on_stack() objtool: Rework ASM_REACHABLE x86: Mark __invalid_creds() __noreturn exit: Mark do_group_exit() __noreturn x86: Mark stop_this_cpu() __noreturn objtool: Ignore extra-symbol code objtool: Rename --duplicate to --lto ... |
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.. | ||
.gitignore | ||
aegis128-aesni-asm.S | ||
aegis128-aesni-glue.c | ||
aes_ctrby8_avx-x86_64.S | ||
aesni-intel_asm.S | ||
aesni-intel_avx-x86_64.S | ||
aesni-intel_glue.c | ||
blake2s-core.S | ||
blake2s-glue.c | ||
blake2s-shash.c | ||
blowfish_glue.c | ||
blowfish-x86_64-asm_64.S | ||
camellia_aesni_avx2_glue.c | ||
camellia_aesni_avx_glue.c | ||
camellia_glue.c | ||
camellia-aesni-avx2-asm_64.S | ||
camellia-aesni-avx-asm_64.S | ||
camellia-x86_64-asm_64.S | ||
camellia.h | ||
cast5_avx_glue.c | ||
cast5-avx-x86_64-asm_64.S | ||
cast6_avx_glue.c | ||
cast6-avx-x86_64-asm_64.S | ||
chacha_glue.c | ||
chacha-avx2-x86_64.S | ||
chacha-avx512vl-x86_64.S | ||
chacha-ssse3-x86_64.S | ||
crc32-pclmul_asm.S | ||
crc32-pclmul_glue.c | ||
crc32c-intel_glue.c | ||
crc32c-pcl-intel-asm_64.S | ||
crct10dif-pcl-asm_64.S | ||
crct10dif-pclmul_glue.c | ||
curve25519-x86_64.c | ||
des3_ede_glue.c | ||
des3_ede-asm_64.S | ||
ecb_cbc_helpers.h | ||
ghash-clmulni-intel_asm.S | ||
ghash-clmulni-intel_glue.c | ||
glue_helper-asm-avx2.S | ||
glue_helper-asm-avx.S | ||
Makefile | ||
nh-avx2-x86_64.S | ||
nh-sse2-x86_64.S | ||
nhpoly1305-avx2-glue.c | ||
nhpoly1305-sse2-glue.c | ||
poly1305_glue.c | ||
poly1305-x86_64-cryptogams.pl | ||
serpent_avx2_glue.c | ||
serpent_avx_glue.c | ||
serpent_sse2_glue.c | ||
serpent-avx2-asm_64.S | ||
serpent-avx-x86_64-asm_64.S | ||
serpent-avx.h | ||
serpent-sse2-i586-asm_32.S | ||
serpent-sse2-x86_64-asm_64.S | ||
serpent-sse2.h | ||
sha1_avx2_x86_64_asm.S | ||
sha1_ni_asm.S | ||
sha1_ssse3_asm.S | ||
sha1_ssse3_glue.c | ||
sha256_ni_asm.S | ||
sha256_ssse3_glue.c | ||
sha256-avx2-asm.S | ||
sha256-avx-asm.S | ||
sha256-ssse3-asm.S | ||
sha512_ssse3_glue.c | ||
sha512-avx2-asm.S | ||
sha512-avx-asm.S | ||
sha512-ssse3-asm.S | ||
sm3_avx_glue.c | ||
sm3-avx-asm_64.S | ||
sm4_aesni_avx2_glue.c | ||
sm4_aesni_avx_glue.c | ||
sm4-aesni-avx2-asm_64.S | ||
sm4-aesni-avx-asm_64.S | ||
sm4-avx.h | ||
twofish_avx_glue.c | ||
twofish_glue_3way.c | ||
twofish_glue.c | ||
twofish-avx-x86_64-asm_64.S | ||
twofish-i586-asm_32.S | ||
twofish-x86_64-asm_64-3way.S | ||
twofish-x86_64-asm_64.S | ||
twofish.h |