2b37c1c3e7
Add binding documentation for the imx8qxp DDR performance monitor unit. Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Rob Herring <robh@kernel.org> [will: Removed trailing newline] Signed-off-by: Will Deacon <will.deacon@arm.com>
22 lines
419 B
Plaintext
22 lines
419 B
Plaintext
* Freescale(NXP) IMX8 DDR performance monitor
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Required properties:
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- compatible: should be one of:
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"fsl,imx8-ddr-pmu"
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"fsl,imx8m-ddr-pmu"
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- reg: physical address and size
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- interrupts: single interrupt
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generated by the control block
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Example:
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ddr-pmu@5c020000 {
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compatible = "fsl,imx8-ddr-pmu";
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reg = <0x5c020000 0x10000>;
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interrupt-parent = <&gic>;
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interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
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};
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