We're going to introduce an additional intel_gt for MTL's media unit soon. Let's provide a bit more multi-GT initialization framework in preparation for that. The initialization will pull the list of GTs for a platform from the device info structure. Although necessary for the immediate MTL media enabling, this same framework will also be used farther down the road when we enable remote tiles on xehpsdv and pvc. v2: - Re-add missing test for !HAS_EXTRA_GT_LIST in intel_gt_probe_all(). v3: - Move intel_gt_definition struct to intel_gt_types.h. (Jani) - Drop gtdef->setup(). For now we'll just use a switch() based on GT type since we don't have too many different handlers for the foreseeable future. (Jani) Cc: Aravind Iddamsetty <aravind.iddamsetty@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Reviewed-by: Aravind Iddamsetty <aravind.iddamsetty@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220906234934.3655440-6-matthew.d.roper@intel.com Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
116 lines
3.2 KiB
C
116 lines
3.2 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2019 Intel Corporation
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*/
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#ifndef __INTEL_GT__
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#define __INTEL_GT__
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#include "intel_engine_types.h"
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#include "intel_gt_types.h"
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#include "intel_reset.h"
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struct drm_i915_private;
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struct drm_printer;
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#define GT_TRACE(gt, fmt, ...) do { \
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const struct intel_gt *gt__ __maybe_unused = (gt); \
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GEM_TRACE("%s " fmt, dev_name(gt__->i915->drm.dev), \
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##__VA_ARGS__); \
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} while (0)
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static inline bool gt_is_root(struct intel_gt *gt)
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{
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return !gt->info.id;
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}
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static inline struct intel_gt *uc_to_gt(struct intel_uc *uc)
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{
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return container_of(uc, struct intel_gt, uc);
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}
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static inline struct intel_gt *guc_to_gt(struct intel_guc *guc)
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{
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return container_of(guc, struct intel_gt, uc.guc);
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}
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static inline struct intel_gt *huc_to_gt(struct intel_huc *huc)
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{
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return container_of(huc, struct intel_gt, uc.huc);
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}
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static inline struct intel_gt *gsc_to_gt(struct intel_gsc *gsc)
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{
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return container_of(gsc, struct intel_gt, gsc);
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}
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void intel_root_gt_init_early(struct drm_i915_private *i915);
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int intel_gt_assign_ggtt(struct intel_gt *gt);
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int intel_gt_init_mmio(struct intel_gt *gt);
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int __must_check intel_gt_init_hw(struct intel_gt *gt);
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int intel_gt_init(struct intel_gt *gt);
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void intel_gt_driver_register(struct intel_gt *gt);
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void intel_gt_driver_unregister(struct intel_gt *gt);
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void intel_gt_driver_remove(struct intel_gt *gt);
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void intel_gt_driver_release(struct intel_gt *gt);
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void intel_gt_driver_late_release_all(struct drm_i915_private *i915);
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int intel_gt_wait_for_idle(struct intel_gt *gt, long timeout);
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void intel_gt_check_and_clear_faults(struct intel_gt *gt);
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void intel_gt_clear_error_registers(struct intel_gt *gt,
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intel_engine_mask_t engine_mask);
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void intel_gt_flush_ggtt_writes(struct intel_gt *gt);
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void intel_gt_chipset_flush(struct intel_gt *gt);
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static inline u32 intel_gt_scratch_offset(const struct intel_gt *gt,
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enum intel_gt_scratch_field field)
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{
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return i915_ggtt_offset(gt->scratch) + field;
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}
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static inline bool intel_gt_has_unrecoverable_error(const struct intel_gt *gt)
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{
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return test_bit(I915_WEDGED_ON_INIT, >->reset.flags) ||
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test_bit(I915_WEDGED_ON_FINI, >->reset.flags);
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}
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static inline bool intel_gt_is_wedged(const struct intel_gt *gt)
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{
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GEM_BUG_ON(intel_gt_has_unrecoverable_error(gt) &&
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!test_bit(I915_WEDGED, >->reset.flags));
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return unlikely(test_bit(I915_WEDGED, >->reset.flags));
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}
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int intel_gt_probe_all(struct drm_i915_private *i915);
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int intel_gt_tiles_init(struct drm_i915_private *i915);
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void intel_gt_release_all(struct drm_i915_private *i915);
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#define for_each_gt(gt__, i915__, id__) \
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for ((id__) = 0; \
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(id__) < I915_MAX_GT; \
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(id__)++) \
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for_each_if(((gt__) = (i915__)->gt[(id__)]))
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void intel_gt_info_print(const struct intel_gt_info *info,
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struct drm_printer *p);
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void intel_gt_watchdog_work(struct work_struct *work);
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static inline u32 intel_gt_tlb_seqno(const struct intel_gt *gt)
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{
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return seqprop_sequence(>->tlb.seqno);
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}
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static inline u32 intel_gt_next_invalidate_tlb_full(const struct intel_gt *gt)
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{
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return intel_gt_tlb_seqno(gt) | 1;
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}
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void intel_gt_invalidate_tlb(struct intel_gt *gt, u32 seqno);
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#endif /* __INTEL_GT_H__ */
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