Dirk Behme 715286f51d clk: renesas: r8a7796: Add RPC clocks
Describe the RPCSRC internal clock and the RPC[D2] clocks derived from
it, as well as the RPC-IF module clock, in the R-Car M3-W/M3-W+
(R8A7796) CPG/MSSR driver.

Inspired by commit 94e3935b5756 ("clk: renesas: r8a77980: Add RPC clocks").

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Link: https://lore.kernel.org/r/20200203072901.31548-2-dirk.behme@de.bosch.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-02-10 14:04:50 +01:00
..
2020-01-04 23:34:39 -08:00
2020-02-08 13:58:44 -08:00
2020-01-04 23:34:39 -08:00
2019-05-30 16:33:37 -07:00
2020-02-08 14:17:27 -08:00
2020-01-04 23:34:39 -08:00
2018-12-11 09:57:47 -08:00
2020-01-28 13:26:48 -08:00
2019-07-15 20:18:40 -07:00