81dd4d4d61
Implement the IDXD performance monitor capability (named 'perfmon' in the DSA (Data Streaming Accelerator) spec [1]), which supports the collection of information about key events occurring during DSA and IAX (Intel Analytics Accelerator) device execution, to assist in performance tuning and debugging. The idxd perfmon support is implemented as part of the IDXD driver and interfaces with the Linux perf framework. It has several features in common with the existing uncore pmu support: - it does not support sampling - does not support per-thread counting However it also has some unique features not present in the core and uncore support: - all general-purpose counters are identical, thus no event constraints - operation is always system-wide While the core perf subsystem assumes that all counters are by default per-cpu, the uncore pmus are socket-scoped and use a cpu mask to restrict counting to one cpu from each socket. IDXD counters use a similar strategy but expand the scope even further; since IDXD counters are system-wide and can be read from any cpu, the IDXD perf driver picks a single cpu to do the work (with cpu hotplug notifiers to choose a different cpu if the chosen one is taken off-line). More specifically, the perf userspace tool by default opens a counter for each cpu for an event. However, if it finds a cpumask file associated with the pmu under sysfs, as is the case with the uncore pmus, it will open counters only on the cpus specified by the cpumask. Since perfmon only needs to open a single counter per event for a given IDXD device, the perfmon driver will create a sysfs cpumask file for the device and insert the first cpu of the system into it. When a user uses perf to open an event, perf will open a single counter on the cpu specified by the cpu mask. This amounts to the default system-wide rather than per-cpu counting mentioned previously for perfmon pmu events. In order to keep the cpu mask up-to-date, the driver implements cpu hotplug support for multiple devices, as IDXD usually enumerates and registers more than one idxd device. The perfmon driver implements basic perfmon hardware capability discovery and configuration, and is initialized by the IDXD driver's probe function. During initialization, the driver retrieves the total number of supported performance counters, the pmu ID, and the device type from idxd device, and registers itself under the Linux perf framework. The perf userspace tool can be used to monitor single or multiple events depending on the given configuration, as well as event groups, which are also supported by the perfmon driver. The user configures events using the perf tool command-line interface by specifying the event and corresponding event category, along with an optional set of filters that can be used to restrict counting to specific work queues, traffic classes, page and transfer sizes, and engines (See [1] for specifics). With the configuration specified by the user, the perf tool issues a system call passing that information to the kernel, which uses it to initialize the specified event(s). The event(s) are opened and started, and following termination of the perf command, they're stopped. At that point, the perfmon driver will read the latest count for the event(s), calculate the difference between the latest counter values and previously tracked counter values, and display the final incremental count as the event count for the cycle. An overflow handler registered on the IDXD irq path is used to account for counter overflows, which are signaled by an overflow interrupt. Below are a couple of examples of perf usage for monitoring DSA events. The following monitors all events in the 'engine' category. Becuuse no filters are specified, this captures all engine events for the workload, which in this case is 19 iterations of the work generated by the kernel dmatest module. Details describing the events can be found in Appendix D of [1], Performance Monitoring Events, but briefly they are: event 0x1: total input data processed, in 32-byte units event 0x2: total data written, in 32-byte units event 0x4: number of work descriptors that read the source event 0x8: number of work descriptors that write the destination event 0x10: number of work descriptors dispatched from batch descriptors event 0x20: number of work descriptors dispatched from work queues # perf stat -e dsa0/event=0x1,event_category=0x1/, dsa0/event=0x2,event_category=0x1/, dsa0/event=0x4,event_category=0x1/, dsa0/event=0x8,event_category=0x1/, dsa0/event=0x10,event_category=0x1/, dsa0/event=0x20,event_category=0x1/ modprobe dmatest channel=dma0chan0 timeout=2000 iterations=19 run=1 wait=1 Performance counter stats for 'system wide': 5,332 dsa0/event=0x1,event_category=0x1/ 5,327 dsa0/event=0x2,event_category=0x1/ 19 dsa0/event=0x4,event_category=0x1/ 19 dsa0/event=0x8,event_category=0x1/ 0 dsa0/event=0x10,event_category=0x1/ 19 dsa0/event=0x20,event_category=0x1/ 21.977436186 seconds time elapsed The command below illustrates filter usage with a simple example. It specifies that MEM_MOVE operations should be counted for the DSA device dsa0 (event 0x8 corresponds to the EV_MEM_MOVE event - Number of Memory Move Descriptors, which is part of event category 0x3 - Operations. The detailed category and event IDs are available in Appendix D, Performance Monitoring Events, of [1]). In addition to the event and event category, a number of filters are also specified (the detailed filter values are available in Chapter 6.4 (Filter Support) of [1]), which will restrict counting to only those events that meet all of the filter criteria. In this case, the filters specify that only MEM_MOVE operations that are serviced by work queue wq0 and specifically engine number engine0 and traffic class tc0 having sizes between 0 and 4k and page size of between 0 and 1G result in a counter hit; anything else will be filtered out and not appear in the final count. Note that filters are optional - any filter not specified is assumed to be all ones and will pass anything. # perf stat -e dsa0/filter_wq=0x1,filter_tc=0x1,filter_sz=0x7, filter_eng=0x1,event=0x8,event_category=0x3/ modprobe dmatest channel=dma0chan0 timeout=2000 iterations=19 run=1 wait=1 Performance counter stats for 'system wide': 19 dsa0/filter_wq=0x1,filter_tc=0x1,filter_sz=0x7, filter_eng=0x1,event=0x8,event_category=0x3/ 21.865914091 seconds time elapsed The output above reflects that the unspecified workload resulted in the counting of 19 MEM_MOVE operation events that met the filter criteria. [1]: https://software.intel.com/content/www/us/en/develop/download/intel-data-streaming-accelerator-preliminary-architecture-specification.html [ Based on work originally by Jing Lin. ] Reviewed-by: Dave Jiang <dave.jiang@intel.com> Reviewed-by: Kan Liang <kan.liang@linux.intel.com> Signed-off-by: Tom Zanussi <tom.zanussi@linux.intel.com> Link: https://lore.kernel.org/r/0c5080a7d541904c4ad42b848c76a1ce056ddac7.1619276133.git.zanussi@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
120 lines
3.1 KiB
C
120 lines
3.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright(c) 2020 Intel Corporation. All rights rsvd. */
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#ifndef _PERFMON_H_
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#define _PERFMON_H_
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#include <linux/slab.h>
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#include <linux/pci.h>
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#include <linux/sbitmap.h>
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#include <linux/dmaengine.h>
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#include <linux/percpu-rwsem.h>
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#include <linux/wait.h>
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#include <linux/cdev.h>
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#include <linux/uuid.h>
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#include <linux/idxd.h>
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#include <linux/perf_event.h>
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#include "registers.h"
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static inline struct idxd_pmu *event_to_pmu(struct perf_event *event)
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{
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struct idxd_pmu *idxd_pmu;
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struct pmu *pmu;
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pmu = event->pmu;
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idxd_pmu = container_of(pmu, struct idxd_pmu, pmu);
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return idxd_pmu;
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}
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static inline struct idxd_device *event_to_idxd(struct perf_event *event)
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{
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struct idxd_pmu *idxd_pmu;
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struct pmu *pmu;
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pmu = event->pmu;
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idxd_pmu = container_of(pmu, struct idxd_pmu, pmu);
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return idxd_pmu->idxd;
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}
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static inline struct idxd_device *pmu_to_idxd(struct pmu *pmu)
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{
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struct idxd_pmu *idxd_pmu;
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idxd_pmu = container_of(pmu, struct idxd_pmu, pmu);
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return idxd_pmu->idxd;
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}
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enum dsa_perf_events {
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DSA_PERF_EVENT_WQ = 0,
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DSA_PERF_EVENT_ENGINE,
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DSA_PERF_EVENT_ADDR_TRANS,
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DSA_PERF_EVENT_OP,
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DSA_PERF_EVENT_COMPL,
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DSA_PERF_EVENT_MAX,
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};
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enum filter_enc {
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FLT_WQ = 0,
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FLT_TC,
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FLT_PG_SZ,
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FLT_XFER_SZ,
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FLT_ENG,
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FLT_MAX,
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};
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#define CONFIG_RESET 0x0000000000000001
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#define CNTR_RESET 0x0000000000000002
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#define CNTR_ENABLE 0x0000000000000001
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#define INTR_OVFL 0x0000000000000002
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#define COUNTER_FREEZE 0x00000000FFFFFFFF
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#define COUNTER_UNFREEZE 0x0000000000000000
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#define OVERFLOW_SIZE 32
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#define CNTRCFG_ENABLE BIT(0)
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#define CNTRCFG_IRQ_OVERFLOW BIT(1)
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#define CNTRCFG_CATEGORY_SHIFT 8
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#define CNTRCFG_EVENT_SHIFT 32
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#define PERFMON_TABLE_OFFSET(_idxd) \
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({ \
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typeof(_idxd) __idxd = (_idxd); \
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((__idxd)->reg_base + (__idxd)->perfmon_offset); \
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})
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#define PERFMON_REG_OFFSET(idxd, offset) \
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(PERFMON_TABLE_OFFSET(idxd) + (offset))
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#define PERFCAP_REG(idxd) (PERFMON_REG_OFFSET(idxd, IDXD_PERFCAP_OFFSET))
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#define PERFRST_REG(idxd) (PERFMON_REG_OFFSET(idxd, IDXD_PERFRST_OFFSET))
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#define OVFSTATUS_REG(idxd) (PERFMON_REG_OFFSET(idxd, IDXD_OVFSTATUS_OFFSET))
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#define PERFFRZ_REG(idxd) (PERFMON_REG_OFFSET(idxd, IDXD_PERFFRZ_OFFSET))
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#define FLTCFG_REG(idxd, cntr, flt) \
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(PERFMON_REG_OFFSET(idxd, IDXD_FLTCFG_OFFSET) + ((cntr) * 32) + ((flt) * 4))
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#define CNTRCFG_REG(idxd, cntr) \
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(PERFMON_REG_OFFSET(idxd, IDXD_CNTRCFG_OFFSET) + ((cntr) * 8))
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#define CNTRDATA_REG(idxd, cntr) \
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(PERFMON_REG_OFFSET(idxd, IDXD_CNTRDATA_OFFSET) + ((cntr) * 8))
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#define CNTRCAP_REG(idxd, cntr) \
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(PERFMON_REG_OFFSET(idxd, IDXD_CNTRCAP_OFFSET) + ((cntr) * 8))
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#define EVNTCAP_REG(idxd, category) \
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(PERFMON_REG_OFFSET(idxd, IDXD_EVNTCAP_OFFSET) + ((category) * 8))
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#define DEFINE_PERFMON_FORMAT_ATTR(_name, _format) \
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static ssize_t __perfmon_idxd_##_name##_show(struct kobject *kobj, \
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struct kobj_attribute *attr, \
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char *page) \
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{ \
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BUILD_BUG_ON(sizeof(_format) >= PAGE_SIZE); \
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return sprintf(page, _format "\n"); \
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} \
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static struct kobj_attribute format_attr_idxd_##_name = \
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__ATTR(_name, 0444, __perfmon_idxd_##_name##_show, NULL)
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#endif
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