Nishad Kamdar 72e3a5248d staging: iio: ad7816: Set RD/WR pin and CONVST pin as outputs. ...

The RD/WR pin and CONVST pin are logical inputs to the AD78xx
chip as per the datasheet. Hence convert them to outputs.

Signed-off-by: Nishad Kamdar <nishadkamdar@gmail.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

2018-11-11 15:29:50 +00:00

..

accel

staging:iio:accel:adis16240: sign extend function replace hard code duplication

2018-06-24 14:45:06 +01:00

adc

staging: iio: ad7816: Set RD/WR pin and CONVST pin as outputs.

2018-11-11 15:29:50 +00:00

addac

staging: iio: adt7316: fix parenthesis alignment

2018-10-14 18:01:38 +01:00

cdc

staging: iio: cdc: ad7150: fix misaligned lines

2018-10-07 20:08:04 +01:00

Documentation

staging:iio:docs: drop setting of THIS_MODULE from staging docs.

2017-09-03 18:10:28 +01:00

frequency

drivers: iio: Update MODULE AUTHOR email address

2018-08-19 17:23:39 +01:00

impedance-analyzer

staging: iio: ad5933: Remove unnecessary blank line

2018-11-03 09:44:34 +00:00

meter

staging:iio:meter: Drop ADE7759 driver

2018-05-20 12:21:54 +01:00

resolver

staging:iio:ad2s90: Check channel type at read_raw

2018-11-11 15:29:49 +00:00

Kconfig

staging: iio: Drop ADIS16060 driver from staging

2018-06-10 11:52:31 +01:00

Makefile

staging: iio: Drop ADIS16060 driver from staging

2018-06-10 11:52:31 +01:00

TODO

staging: iio: Augment TODO file with GPIO work item

2018-04-23 14:36:10 +02:00