Russell King 24cb65feab ARM: l2c: cns3xxx: remove cache size override ...

The cache size should already be present in the L2 cache auxiliary
control register: it is part of the integration process to configure
the hardware IP.  Most platforms get this right, yet still many
cargo-cult program, and assume that they always need specifying to
the L2 cache code.  Remove them so we can find out which really need
this.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

2014-05-30 00:49:07 +01:00

..

cns3xxx.h

ARM: arm-soc multiplatform updates for 3.10

2013-05-02 09:38:16 -07:00

cns3420vb.c

CNS3xxx: Fix a WARN() related to IRQ allocation.

2014-03-17 15:33:20 +01:00

core.c

ARM: l2c: cns3xxx: remove cache size override

2014-05-30 00:49:07 +01:00

core.h

reboot: arm: change reboot_mode to use enum reboot_mode

2013-07-09 10:33:29 -07:00

devices.c

ARM: cns3xxx: make mach header files local

2013-03-14 17:34:55 +01:00

devices.h

ARM: cns3xxx: Add support for AHCI controllers

2010-06-08 17:37:09 +04:00

Kconfig

ARM: cns3xxx: enable V6K instead of plain V6

2014-02-19 16:47:15 -06:00

Makefile

ARM: cns3xxx: initial DT support

2013-03-14 22:30:21 +01:00

Makefile.boot

ARM: 7022/1: allow to detect conflicting zreladdrs

2011-10-17 09:12:40 +01:00

pcie.c

CNS3xxx: Fix PCIe early iotable_init().

2014-03-17 15:35:21 +01:00

pm.c

reboot: arm: change reboot_mode to use enum reboot_mode

2013-07-09 10:33:29 -07:00

pm.h

ARM: cns3xxx: make mach header files local

2013-03-14 17:34:55 +01:00