087cdfb662
Debugging (hierarchical) interupt domains is tedious as there is no information about the hierarchy and no information about states of interrupts in the various domain levels. Add a debugfs directory 'irq' and subdirectories 'domains' and 'irqs'. The domains directory contains the domain files. The content is information about the domain. If the domain is part of a hierarchy then the parent domains are printed as well. # ls /sys/kernel/debug/irq/domains/ default INTEL-IR-2 INTEL-IR-MSI-2 IO-APIC-IR-2 PCI-MSI DMAR-MSI INTEL-IR-3 INTEL-IR-MSI-3 IO-APIC-IR-3 unknown-1 INTEL-IR-0 INTEL-IR-MSI-0 IO-APIC-IR-0 IO-APIC-IR-4 VECTOR INTEL-IR-1 INTEL-IR-MSI-1 IO-APIC-IR-1 PCI-HT # cat /sys/kernel/debug/irq/domains/VECTOR name: VECTOR size: 0 mapped: 216 flags: 0x00000041 # cat /sys/kernel/debug/irq/domains/IO-APIC-IR-0 name: IO-APIC-IR-0 size: 24 mapped: 19 flags: 0x00000041 parent: INTEL-IR-3 name: INTEL-IR-3 size: 65536 mapped: 167 flags: 0x00000041 parent: VECTOR name: VECTOR size: 0 mapped: 216 flags: 0x00000041 Unfortunately there is no per cpu information about the VECTOR domain (yet). The irqs directory contains detailed information about mapped interrupts. # cat /sys/kernel/debug/irq/irqs/3 handler: handle_edge_irq status: 0x00004000 istate: 0x00000000 ddepth: 1 wdepth: 0 dstate: 0x01018000 IRQD_IRQ_DISABLED IRQD_SINGLE_TARGET IRQD_MOVE_PCNTXT node: 0 affinity: 0-143 effectiv: 0 pending: domain: IO-APIC-IR-0 hwirq: 0x3 chip: IR-IO-APIC flags: 0x10 IRQCHIP_SKIP_SET_WAKE parent: domain: INTEL-IR-3 hwirq: 0x20000 chip: INTEL-IR flags: 0x0 parent: domain: VECTOR hwirq: 0x3 chip: APIC flags: 0x0 This was developed to simplify the debugging of the managed affinity changes. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Jens Axboe <axboe@kernel.dk> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Keith Busch <keith.busch@intel.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Christoph Hellwig <hch@lst.de> Link: http://lkml.kernel.org/r/20170619235444.537566163@linutronix.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
123 lines
2.9 KiB
Plaintext
123 lines
2.9 KiB
Plaintext
menu "IRQ subsystem"
|
|
# Options selectable by the architecture code
|
|
|
|
# Make sparse irq Kconfig switch below available
|
|
config MAY_HAVE_SPARSE_IRQ
|
|
bool
|
|
|
|
# Legacy support, required for itanic
|
|
config GENERIC_IRQ_LEGACY
|
|
bool
|
|
|
|
# Enable the generic irq autoprobe mechanism
|
|
config GENERIC_IRQ_PROBE
|
|
bool
|
|
|
|
# Use the generic /proc/interrupts implementation
|
|
config GENERIC_IRQ_SHOW
|
|
bool
|
|
|
|
# Print level/edge extra information
|
|
config GENERIC_IRQ_SHOW_LEVEL
|
|
bool
|
|
|
|
# Facility to allocate a hardware interrupt. This is legacy support
|
|
# and should not be used in new code. Use irq domains instead.
|
|
config GENERIC_IRQ_LEGACY_ALLOC_HWIRQ
|
|
bool
|
|
|
|
# Support for delayed migration from interrupt context
|
|
config GENERIC_PENDING_IRQ
|
|
bool
|
|
|
|
# Support for generic irq migrating off cpu before the cpu is offline.
|
|
config GENERIC_IRQ_MIGRATION
|
|
bool
|
|
|
|
# Alpha specific irq affinity mechanism
|
|
config AUTO_IRQ_AFFINITY
|
|
bool
|
|
|
|
# Tasklet based software resend for pending interrupts on enable_irq()
|
|
config HARDIRQS_SW_RESEND
|
|
bool
|
|
|
|
# Preflow handler support for fasteoi (sparc64)
|
|
config IRQ_PREFLOW_FASTEOI
|
|
bool
|
|
|
|
# Edge style eoi based handler (cell)
|
|
config IRQ_EDGE_EOI_HANDLER
|
|
bool
|
|
|
|
# Generic configurable interrupt chip implementation
|
|
config GENERIC_IRQ_CHIP
|
|
bool
|
|
select IRQ_DOMAIN
|
|
|
|
# Generic irq_domain hw <--> linux irq number translation
|
|
config IRQ_DOMAIN
|
|
bool
|
|
|
|
# Support for hierarchical irq domains
|
|
config IRQ_DOMAIN_HIERARCHY
|
|
bool
|
|
select IRQ_DOMAIN
|
|
|
|
# Generic IRQ IPI support
|
|
config GENERIC_IRQ_IPI
|
|
bool
|
|
|
|
# Generic MSI interrupt support
|
|
config GENERIC_MSI_IRQ
|
|
bool
|
|
|
|
# Generic MSI hierarchical interrupt domain support
|
|
config GENERIC_MSI_IRQ_DOMAIN
|
|
bool
|
|
select IRQ_DOMAIN_HIERARCHY
|
|
select GENERIC_MSI_IRQ
|
|
|
|
config HANDLE_DOMAIN_IRQ
|
|
bool
|
|
|
|
config IRQ_DOMAIN_DEBUG
|
|
bool "Expose hardware/virtual IRQ mapping via debugfs"
|
|
depends on IRQ_DOMAIN && DEBUG_FS
|
|
help
|
|
This option will show the mapping relationship between hardware irq
|
|
numbers and Linux irq numbers. The mapping is exposed via debugfs
|
|
in the file "irq_domain_mapping".
|
|
|
|
If you don't know what this means you don't need it.
|
|
|
|
# Support forced irq threading
|
|
config IRQ_FORCED_THREADING
|
|
bool
|
|
|
|
config SPARSE_IRQ
|
|
bool "Support sparse irq numbering" if MAY_HAVE_SPARSE_IRQ
|
|
---help---
|
|
|
|
Sparse irq numbering is useful for distro kernels that want
|
|
to define a high CONFIG_NR_CPUS value but still want to have
|
|
low kernel memory footprint on smaller machines.
|
|
|
|
( Sparse irqs can also be beneficial on NUMA boxes, as they spread
|
|
out the interrupt descriptors in a more NUMA-friendly way. )
|
|
|
|
If you don't know what to do here, say N.
|
|
|
|
config GENERIC_IRQ_DEBUGFS
|
|
bool "Expose irq internals in debugfs"
|
|
depends on DEBUG_FS
|
|
default n
|
|
---help---
|
|
|
|
Exposes internal state information through debugfs. Mostly for
|
|
developers and debugging of hard to diagnose interrupt problems.
|
|
|
|
If you don't know what to do here, say N.
|
|
|
|
endmenu
|