7499bfeedb
In current implementation the Arasan NAND driver is updating the
system clock(i.e., anand->clk) in accordance to the timing modes
(i.e., SDR or NVDDR). But as per the Arasan NAND controller spec the
flash clock or the NAND bus clock(i.e., nfc->bus_clk), need to be
updated instead. This patch keeps the system clock unchanged and updates
the NAND bus clock as per the timing modes.
Fixes:
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|---|---|---|
| .. | ||
| onenand | ||
| raw | ||
| spi | ||
| bbt.c | ||
| core.c | ||
| ecc-mtk.c | ||
| ecc-mxic.c | ||
| ecc-sw-bch.c | ||
| ecc-sw-hamming.c | ||
| ecc.c | ||
| Kconfig | ||
| Makefile | ||