c535bfdd0f
The Event Queue MSI/X ID is different per ASIC. This patch renames the current define to have the GOYA_ prefix to mark it only for Goya. It also moves it from the common armcp_if.h file to the ASIC specific goya_fw_if.h file. Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
31 lines
511 B
C
31 lines
511 B
C
/* SPDX-License-Identifier: GPL-2.0
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*
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* Copyright 2016-2018 HabanaLabs, Ltd.
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* All Rights Reserved.
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*
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*/
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#ifndef GOYA_FW_IF_H
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#define GOYA_FW_IF_H
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#define GOYA_EVENT_QUEUE_MSIX_IDX 5
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#define CPU_BOOT_ADDR 0x7FF8040000ull
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#define UBOOT_FW_OFFSET 0x100000 /* 1MB in SRAM */
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#define LINUX_FW_OFFSET 0x800000 /* 8MB in DDR */
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enum goya_pll_index {
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CPU_PLL = 0,
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IC_PLL,
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MC_PLL,
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MME_PLL,
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PCI_PLL,
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EMMC_PLL,
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TPC_PLL
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};
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#define GOYA_PLL_FREQ_LOW 50000000 /* 50 MHz */
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#endif /* GOYA_FW_IF_H */
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