762c7e9332
User contexts request interrupts and are started using the "start work" interface. Populate the start_work() fop to allocate and map interrupts before starting the user context. As part of starting the context, update the user process identification logic to properly derive the data required by the SPA. Also, introduce a skeleton interrupt handler using a bitmap, flag, and spinlock to track interrupts. This handler will be expanded in future commits. Signed-off-by: Uma Krishnan <ukrishn@linux.vnet.ibm.com> Acked-by: Matthew R. Ochs <mrochs@linux.vnet.ibm.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
64 lines
2.2 KiB
C
64 lines
2.2 KiB
C
/*
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* CXL Flash Device Driver
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*
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* Written by: Matthew R. Ochs <mrochs@linux.vnet.ibm.com>, IBM Corporation
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* Uma Krishnan <ukrishn@linux.vnet.ibm.com>, IBM Corporation
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*
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* Copyright (C) 2018 IBM Corporation
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#define OCXL_MAX_IRQS 4 /* Max interrupts per process */
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struct ocxlflash_irqs {
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int hwirq;
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u32 virq;
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u64 ptrig;
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void __iomem *vtrig;
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};
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/* OCXL hardware AFU associated with the host */
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struct ocxl_hw_afu {
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struct ocxlflash_context *ocxl_ctx; /* Host context */
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struct pci_dev *pdev; /* PCI device */
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struct device *dev; /* Generic device */
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bool perst_same_image; /* Same image loaded on perst */
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struct ocxl_fn_config fcfg; /* DVSEC config of the function */
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struct ocxl_afu_config acfg; /* AFU configuration data */
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int fn_actag_base; /* Function acTag base */
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int fn_actag_enabled; /* Function acTag number enabled */
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int afu_actag_base; /* AFU acTag base */
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int afu_actag_enabled; /* AFU acTag number enabled */
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phys_addr_t ppmmio_phys; /* Per process MMIO space */
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phys_addr_t gmmio_phys; /* Global AFU MMIO space */
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void __iomem *gmmio_virt; /* Global MMIO map */
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void *link_token; /* Link token for the SPA */
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struct idr idr; /* IDR to manage contexts */
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int max_pasid; /* Maximum number of contexts */
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bool is_present; /* Function has AFUs defined */
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};
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struct ocxlflash_context {
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struct ocxl_hw_afu *hw_afu; /* HW AFU back pointer */
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struct address_space *mapping; /* Mapping for pseudo filesystem */
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bool master; /* Whether this is a master context */
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int pe; /* Process element */
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phys_addr_t psn_phys; /* Process mapping */
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u64 psn_size; /* Process mapping size */
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spinlock_t slock; /* Protects irq/fault/event updates */
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struct ocxlflash_irqs *irqs; /* Pointer to array of structures */
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int num_irqs; /* Number of interrupts */
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bool pending_irq; /* Pending interrupt on the context */
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ulong irq_bitmap; /* Bits indicating pending irq num */
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};
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