Aneesh Kumar K.V 76e6c73f33 powerpc/pmem: Update ppc64 to use the new barrier instruction. ...

pmem on POWER10 can now use phwsync instead of hwsync to ensure
all previous writes are architecturally visible for the platform
buffer flush.

Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20200701072235.223558-6-aneesh.kumar@linux.ibm.com

2020-07-16 13:00:23 +10:00

..

asm

powerpc/pmem: Update ppc64 to use the new barrier instruction.

2020-07-16 13:00:23 +10:00

uapi/asm

powerpc/papr_scm: Implement support for PAPR_PDSM_HEALTH

2020-06-15 18:22:44 -07:00