CXL 2.0 allows for dynamic provisioning of new memory regions (system physical address resources like "System RAM" and "Persistent Memory"). Whereas DDR and PMEM resources are conveyed statically at boot, CXL allows for assembling and instantiating new regions from the available capacity of CXL memory expanders in the system. Sysfs with an "echo $region_name > $create_region_attribute" interface is chosen as the mechanism to initiate the provisioning process. This was chosen over ioctl() and netlink() to keep the configuration interface entirely in a pseudo-fs interface, and it was chosen over configfs since, aside from this one creation event, the interface is read-mostly. I.e. configfs supports cases where an object is designed to be provisioned each boot, like an iSCSI storage target, and CXL region creation is mostly for PMEM regions which are created usually once per-lifetime of a server instance. This is an improvement over nvdimm that pre-created "seed" devices that tended to confuse users looking to determine which devices are active and which are idle. Recall that the major change that CXL brings over previous persistent memory architectures is the ability to dynamically define new regions. Compare that to drivers like 'nfit' where the region configuration is statically defined by platform firmware. Regions are created as a child of a root decoder that encompasses an address space with constraints. When created through sysfs, the root decoder is explicit. When created from an LSA's region structure a root decoder will possibly need to be inferred by the driver. Upon region creation through sysfs, a vacant region is created with a unique name. Regions have a number of attributes that must be configured before the region can be bound to the driver where HDM decoder program is completed. An example of creating a new region: - Allocate a new region name: region=$(cat /sys/bus/cxl/devices/decoder0.0/create_pmem_region) - Create a new region by name: while region=$(cat /sys/bus/cxl/devices/decoder0.0/create_pmem_region) ! echo $region > /sys/bus/cxl/devices/decoder0.0/create_pmem_region do true; done - Region now exists in sysfs: stat -t /sys/bus/cxl/devices/decoder0.0/$region - Delete the region, and name: echo $region > /sys/bus/cxl/devices/decoder0.0/delete_region Signed-off-by: Ben Widawsky <bwidawsk@kernel.org> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://lore.kernel.org/r/165784333909.1758207.794374602146306032.stgit@dwillia2-xfh.jf.intel.com [djbw: simplify locking, reword changelog] Signed-off-by: Dan Williams <dan.j.williams@intel.com>
202 lines
4.9 KiB
C
202 lines
4.9 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/* Copyright(c) 2022 Intel Corporation. All rights reserved. */
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#include <linux/memregion.h>
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#include <linux/genalloc.h>
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#include <linux/device.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/idr.h>
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#include <cxl.h>
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#include "core.h"
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/**
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* DOC: cxl core region
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*
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* CXL Regions represent mapped memory capacity in system physical address
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* space. Whereas the CXL Root Decoders identify the bounds of potential CXL
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* Memory ranges, Regions represent the active mapped capacity by the HDM
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* Decoder Capability structures throughout the Host Bridges, Switches, and
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* Endpoints in the topology.
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*/
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static struct cxl_region *to_cxl_region(struct device *dev);
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static void cxl_region_release(struct device *dev)
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{
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struct cxl_region *cxlr = to_cxl_region(dev);
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memregion_free(cxlr->id);
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kfree(cxlr);
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}
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static const struct device_type cxl_region_type = {
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.name = "cxl_region",
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.release = cxl_region_release,
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};
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bool is_cxl_region(struct device *dev)
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{
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return dev->type == &cxl_region_type;
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}
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EXPORT_SYMBOL_NS_GPL(is_cxl_region, CXL);
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static struct cxl_region *to_cxl_region(struct device *dev)
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{
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if (dev_WARN_ONCE(dev, dev->type != &cxl_region_type,
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"not a cxl_region device\n"))
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return NULL;
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return container_of(dev, struct cxl_region, dev);
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}
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static void unregister_region(void *dev)
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{
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device_unregister(dev);
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}
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static struct lock_class_key cxl_region_key;
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static struct cxl_region *cxl_region_alloc(struct cxl_root_decoder *cxlrd, int id)
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{
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struct cxl_region *cxlr;
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struct device *dev;
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cxlr = kzalloc(sizeof(*cxlr), GFP_KERNEL);
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if (!cxlr) {
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memregion_free(id);
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return ERR_PTR(-ENOMEM);
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}
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dev = &cxlr->dev;
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device_initialize(dev);
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lockdep_set_class(&dev->mutex, &cxl_region_key);
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dev->parent = &cxlrd->cxlsd.cxld.dev;
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device_set_pm_not_required(dev);
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dev->bus = &cxl_bus_type;
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dev->type = &cxl_region_type;
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cxlr->id = id;
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return cxlr;
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}
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/**
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* devm_cxl_add_region - Adds a region to a decoder
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* @cxlrd: root decoder
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* @id: memregion id to create, or memregion_free() on failure
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* @mode: mode for the endpoint decoders of this region
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* @type: select whether this is an expander or accelerator (type-2 or type-3)
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*
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* This is the second step of region initialization. Regions exist within an
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* address space which is mapped by a @cxlrd.
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*
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* Return: 0 if the region was added to the @cxlrd, else returns negative error
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* code. The region will be named "regionZ" where Z is the unique region number.
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*/
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static struct cxl_region *devm_cxl_add_region(struct cxl_root_decoder *cxlrd,
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int id,
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enum cxl_decoder_mode mode,
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enum cxl_decoder_type type)
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{
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struct cxl_port *port = to_cxl_port(cxlrd->cxlsd.cxld.dev.parent);
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struct cxl_region *cxlr;
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struct device *dev;
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int rc;
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cxlr = cxl_region_alloc(cxlrd, id);
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if (IS_ERR(cxlr))
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return cxlr;
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cxlr->mode = mode;
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cxlr->type = type;
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dev = &cxlr->dev;
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rc = dev_set_name(dev, "region%d", id);
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if (rc)
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goto err;
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rc = device_add(dev);
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if (rc)
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goto err;
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rc = devm_add_action_or_reset(port->uport, unregister_region, cxlr);
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if (rc)
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return ERR_PTR(rc);
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dev_dbg(port->uport, "%s: created %s\n",
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dev_name(&cxlrd->cxlsd.cxld.dev), dev_name(dev));
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return cxlr;
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err:
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put_device(dev);
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return ERR_PTR(rc);
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}
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static ssize_t create_pmem_region_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct cxl_root_decoder *cxlrd = to_cxl_root_decoder(dev);
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return sysfs_emit(buf, "region%u\n", atomic_read(&cxlrd->region_id));
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}
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static ssize_t create_pmem_region_store(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t len)
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{
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struct cxl_root_decoder *cxlrd = to_cxl_root_decoder(dev);
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struct cxl_region *cxlr;
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int id, rc;
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rc = sscanf(buf, "region%d\n", &id);
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if (rc != 1)
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return -EINVAL;
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rc = memregion_alloc(GFP_KERNEL);
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if (rc < 0)
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return rc;
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if (atomic_cmpxchg(&cxlrd->region_id, id, rc) != id) {
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memregion_free(rc);
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return -EBUSY;
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}
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cxlr = devm_cxl_add_region(cxlrd, id, CXL_DECODER_PMEM,
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CXL_DECODER_EXPANDER);
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if (IS_ERR(cxlr))
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return PTR_ERR(cxlr);
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return len;
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}
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DEVICE_ATTR_RW(create_pmem_region);
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static struct cxl_region *
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cxl_find_region_by_name(struct cxl_root_decoder *cxlrd, const char *name)
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{
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struct cxl_decoder *cxld = &cxlrd->cxlsd.cxld;
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struct device *region_dev;
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region_dev = device_find_child_by_name(&cxld->dev, name);
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if (!region_dev)
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return ERR_PTR(-ENODEV);
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return to_cxl_region(region_dev);
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}
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static ssize_t delete_region_store(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t len)
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{
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struct cxl_root_decoder *cxlrd = to_cxl_root_decoder(dev);
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struct cxl_port *port = to_cxl_port(dev->parent);
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struct cxl_region *cxlr;
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cxlr = cxl_find_region_by_name(cxlrd, buf);
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if (IS_ERR(cxlr))
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return PTR_ERR(cxlr);
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devm_release_action(port->uport, unregister_region, cxlr);
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put_device(&cxlr->dev);
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return len;
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}
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DEVICE_ATTR_WO(delete_region);
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