77ef56e4f0
Most of things are in place and we can enable support for 5-level paging. The patch makes XEN_PV and XEN_PVH dependent on !X86_5LEVEL. Both are not ready to work with 5-level paging. Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Reviewed-by: Juergen Gross <jgross@suse.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Dave Hansen <dave.hansen@intel.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-arch@vger.kernel.org Cc: linux-mm@kvack.org Link: http://lkml.kernel.org/r/20170716225954.74185-9-kirill.shutemov@linux.intel.com [ Minor readability edits. ] Signed-off-by: Ingo Molnar <mingo@kernel.org> |
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i386 | ||
x86_64 | ||
00-INDEX | ||
amd-memory-encryption.txt | ||
boot.txt | ||
early-microcode.txt | ||
earlyprintk.txt | ||
entry_64.txt | ||
exception-tables.txt | ||
intel_mpx.txt | ||
intel_rdt_ui.txt | ||
kernel-stacks | ||
mtrr.txt | ||
pat.txt | ||
protection-keys.txt | ||
tlb.txt | ||
topology.txt | ||
usb-legacy-support.txt | ||
zero-page.txt |