780244a2fe
The TCC_DISABLE registers were not included in the 10.3 headers and instead just placed directly in the gfx_v10_0.c source. This patch adds them to the headers so tools like umr can scan them and support them. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>