78bdc3106a
This updates the ppc iommu/pci dma mappers to sg chaining. Includes further fixes from FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>. Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
261 lines
6.1 KiB
C
261 lines
6.1 KiB
C
/*
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* Copyright (C) 2004 IBM
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*
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* Implements the generic device dma API for powerpc.
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* the pci and vio busses
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*/
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#ifndef _ASM_DMA_MAPPING_H
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#define _ASM_DMA_MAPPING_H
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static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
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size_t size,
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enum dma_data_direction direction)
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{
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struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
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BUG_ON(!dma_ops);
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dma_ops->unmap_single(dev, dma_address, size, direction);
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}
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static inline int dma_map_sg(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction direction)
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{
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struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
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BUG_ON(!dma_ops);
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return dma_ops->map_sg(dev, sg, nents, direction);
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}
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static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
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int nhwentries,
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enum dma_data_direction direction)
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{
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struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
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BUG_ON(!dma_ops);
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dma_ops->unmap_sg(dev, sg, nhwentries, direction);
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}
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/*
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* Available generic sets of operations
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*/
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extern struct dma_mapping_ops dma_iommu_ops;
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extern struct dma_mapping_ops dma_direct_ops;
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extern unsigned long dma_direct_offset;
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#else /* CONFIG_PPC64 */
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#define dma_supported(dev, mask) (1)
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static inline int dma_set_mask(struct device *dev, u64 dma_mask)
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{
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if (!dev->dma_mask || !dma_supported(dev, mask))
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return -EIO;
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*dev->dma_mask = dma_mask;
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return 0;
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}
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static inline void *dma_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t * dma_handle,
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gfp_t gfp)
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{
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#ifdef CONFIG_NOT_COHERENT_CACHE
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return __dma_alloc_coherent(size, dma_handle, gfp);
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#else
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void *ret;
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/* ignore region specifiers */
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gfp &= ~(__GFP_DMA | __GFP_HIGHMEM);
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if (dev == NULL || dev->coherent_dma_mask < 0xffffffff)
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gfp |= GFP_DMA;
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ret = (void *)__get_free_pages(gfp, get_order(size));
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if (ret != NULL) {
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memset(ret, 0, size);
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*dma_handle = virt_to_bus(ret);
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}
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return ret;
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#endif
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}
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static inline void
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dma_free_coherent(struct device *dev, size_t size, void *vaddr,
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dma_addr_t dma_handle)
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{
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#ifdef CONFIG_NOT_COHERENT_CACHE
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__dma_free_coherent(size, vaddr);
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#else
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free_pages((unsigned long)vaddr, get_order(size));
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#endif
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}
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static inline dma_addr_t
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dma_map_single(struct device *dev, void *ptr, size_t size,
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enum dma_data_direction direction)
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{
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BUG_ON(direction == DMA_NONE);
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__dma_sync(ptr, size, direction);
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return virt_to_bus(ptr);
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}
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static inline void dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
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size_t size,
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enum dma_data_direction direction)
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{
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/* We do nothing. */
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}
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static inline dma_addr_t
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dma_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size,
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enum dma_data_direction direction)
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{
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BUG_ON(direction == DMA_NONE);
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__dma_sync_page(page, offset, size, direction);
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return page_to_bus(page) + offset;
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}
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static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
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size_t size,
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enum dma_data_direction direction)
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{
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/* We do nothing. */
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}
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static inline int
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dma_map_sg(struct device *dev, struct scatterlist *sgl, int nents,
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enum dma_data_direction direction)
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{
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struct scatterlist *sg;
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int i;
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BUG_ON(direction == DMA_NONE);
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for_each_sg(sgl, sg, nents, i) {
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BUG_ON(!sg->page);
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__dma_sync_page(sg->page, sg->offset, sg->length, direction);
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sg->dma_address = page_to_bus(sg->page) + sg->offset;
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}
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return nents;
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}
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static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
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int nhwentries,
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enum dma_data_direction direction)
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{
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/* We don't do anything here. */
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}
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#endif /* CONFIG_PPC64 */
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static inline void dma_sync_single_for_cpu(struct device *dev,
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dma_addr_t dma_handle, size_t size,
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enum dma_data_direction direction)
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{
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BUG_ON(direction == DMA_NONE);
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__dma_sync(bus_to_virt(dma_handle), size, direction);
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}
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static inline void dma_sync_single_for_device(struct device *dev,
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dma_addr_t dma_handle, size_t size,
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enum dma_data_direction direction)
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{
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BUG_ON(direction == DMA_NONE);
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__dma_sync(bus_to_virt(dma_handle), size, direction);
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}
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static inline void dma_sync_sg_for_cpu(struct device *dev,
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struct scatterlist *sgl, int nents,
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enum dma_data_direction direction)
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{
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struct scatterlist *sg;
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int i;
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BUG_ON(direction == DMA_NONE);
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for_each_sg(sgl, sg, nents, i)
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__dma_sync_page(sg->page, sg->offset, sg->length, direction);
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}
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static inline void dma_sync_sg_for_device(struct device *dev,
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struct scatterlist *sgl, int nents,
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enum dma_data_direction direction)
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{
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struct scatterlist *sg;
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int i;
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BUG_ON(direction == DMA_NONE);
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for_each_sg(sgl, sg, nents, i)
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__dma_sync_page(sg->page, sg->offset, sg->length, direction);
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}
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static inline int dma_mapping_error(dma_addr_t dma_addr)
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{
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#ifdef CONFIG_PPC64
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return (dma_addr == DMA_ERROR_CODE);
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#else
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return 0;
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#endif
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}
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#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
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#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
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#ifdef CONFIG_NOT_COHERENT_CACHE
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#define dma_is_consistent(d, h) (0)
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#else
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#define dma_is_consistent(d, h) (1)
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#endif
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static inline int dma_get_cache_alignment(void)
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{
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#ifdef CONFIG_PPC64
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/* no easy way to get cache size on all processors, so return
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* the maximum possible, to be safe */
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return (1 << INTERNODE_CACHE_SHIFT);
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#else
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/*
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* Each processor family will define its own L1_CACHE_SHIFT,
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* L1_CACHE_BYTES wraps to this, so this is always safe.
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*/
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return L1_CACHE_BYTES;
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#endif
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}
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static inline void dma_sync_single_range_for_cpu(struct device *dev,
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dma_addr_t dma_handle, unsigned long offset, size_t size,
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enum dma_data_direction direction)
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{
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/* just sync everything for now */
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dma_sync_single_for_cpu(dev, dma_handle, offset + size, direction);
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}
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static inline void dma_sync_single_range_for_device(struct device *dev,
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dma_addr_t dma_handle, unsigned long offset, size_t size,
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enum dma_data_direction direction)
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{
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/* just sync everything for now */
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dma_sync_single_for_device(dev, dma_handle, offset + size, direction);
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}
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static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction direction)
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{
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BUG_ON(direction == DMA_NONE);
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__dma_sync(vaddr, size, (int)direction);
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}
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#endif /* __KERNEL__ */
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#endif /* _ASM_DMA_MAPPING_H */
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